linux.git/drivers/gpu/drm/amd/display, branch v6.2-rc7

drm/amd/display: Properly handle additional cases where DCN is not supported

2023-02-02T03:45:51+00:00

There could be boards with DCN listed in IP discovery, but no
display hardware actually wired up.  In this case the vbios
display table will not be populated.  Detect this case and
skip loading DM when we detect it.

v2: Mark DCN as harvested as well so other display checks
elsewhere in the driver are handled properly.

Cc: Aurabindo Pillai 
Reviewed-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher

drm/amd/display: Reset DMUB mailbox SW state after HW reset

2023-02-02T03:45:50+00:00

[Why]
Otherwise we can be out of sync with what's in the hardware, leading
to us rerunning every command that's presently in the ringbuffer.

[How]
Reset software state for the mailboxes in hw_reset callback.
This is already done as part of the mailbox init in hw_init, but we
do need to remember to reset the last cached wptr value as well here.

Reviewed-by: Hansen Dsouza 
Acked-by: Alex Hung 
Signed-off-by: Nicholas Kazlauskas 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Unassign does_plane_fit_in_mall function from dcn3.2

2023-02-02T03:45:50+00:00

[Why]
The hwss function does_plane_fit_in_mall not applicable to dcn3.2 asics.
Using it with dcn3.2 can result in undefined behaviour.

[How]
Assign the function pointer to NULL.

Reviewed-by: Alvin Lee 
Acked-by: Alex Hung 
Signed-off-by: George Shen 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Adjust downscaling limits for dcn314

2023-02-02T03:45:50+00:00

[Why]
Lower max_downscale_ratio and ARGB888 downscale factor
to prevent cases where underflow may occur on dcn314

[How]
Set max_downscale_ratio to 400 and ARGB downscale factor
to 250 for dcn314

Reviewed-by: Nicholas Kazlauskas 
Acked-by: Alex Hung 
Signed-off-by: Daniel Miess 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Add missing brackets in calculation

2023-02-02T03:45:50+00:00

[Why]
Brackets missing in the calculation for MIN_DST_Y_NEXT_START

[How]
Add missing brackets for this calculation

Reviewed-by: Nicholas Kazlauskas 
Acked-by: Alex Hung 
Signed-off-by: Daniel Miess 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

amdgpu: fix build on non-DCN platforms.

2023-01-27T02:15:13+00:00

This fixes the build here locally on my 32-bit arm build.

Signed-off-by: Dave Airlie

drm/amd/display: Fix timing not changning when freesync video is enabled

2023-01-25T19:50:18+00:00

[Why&How]
Switching between certain modes that are freesync video modes and those
are not freesync video modes result in timing not changing as seen by
the monitor due to incorrect timing being driven.

The issue is fixed by ensuring that when a non freesync video mode is
set, we reset the freesync status on the crtc.

Reviewed-by: Nicholas Kazlauskas 
Acked-by: Alan Liu 
Signed-off-by: Aurabindo Pillai 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amdgpu/display/mst: update mst_mgr relevant variable when long HPD

2023-01-25T18:54:19+00:00

[Why & How]
Now the vc_start_slot is controlled at drm side. When we
service a long HPD, we still need to run
dm_helpers_dp_mst_write_payload_allocation_table() to update
drm mst_mgr's relevant variable. Otherwise, on the next plug-in,
payload will get assigned with a wrong start slot.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2171
Signed-off-by: Wayne Lin 
Signed-off-by: Harry Wentland 
Fixes: 4d07b0bc4034 ("drm/display/dp_mst: Move all payload info into the atomic state")
Cc: stable@vger.kernel.org # 6.1
Acked-by: Harry Wentland 
Reviewed-by: Lyude Paul 
Tested-by: Didier Raboud 
Signed-off-by: Alex Deucher

drm/amdgpu/display/mst: limit payload to be updated one by one

2023-01-25T18:54:05+00:00

[Why]
amdgpu expects to update payload table for one stream one time
by calling dm_helpers_dp_mst_write_payload_allocation_table().
Currently, it get modified to try to update HW payload table
at once by referring mst_state.

[How]
This is just a quick workaround. Should find way to remove the
temporary struct dc_dp_mst_stream_allocation_table later if set
struct link_mst_stream_allocatio directly is possible.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2171
Signed-off-by: Wayne Lin 
Signed-off-by: Harry Wentland 
Fixes: 4d07b0bc4034 ("drm/display/dp_mst: Move all payload info into the atomic state")
Cc: stable@vger.kernel.org # 6.1
Acked-by: Harry Wentland 
Reviewed-by: Lyude Paul 
Tested-by: Didier Raboud 
Signed-off-by: Alex Deucher

drm/amdgpu/display/mst: Fix mst_state->pbn_div and slot count assignments

2023-01-25T18:53:45+00:00

Looks like I made a pretty big mistake here without noticing: it seems when
I moved the assignments of mst_state->pbn_div I completely missed the fact
that the reason for us calling drm_dp_mst_update_slots() earlier was to
account for the fact that we need to call this function using info from the
root MST connector, instead of just trying to do this from each MST
encoder's atomic check function. Otherwise, we end up filling out all of
DC's link information with zeroes.

So, let's restore that and hopefully fix this DSC regression.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2171
Signed-off-by: Lyude Paul 
Signed-off-by: Harry Wentland 
Fixes: 4d07b0bc4034 ("drm/display/dp_mst: Move all payload info into the atomic state")
Cc: stable@vger.kernel.org # 6.1
Reviewed-by: Harry Wentland 
Tested-by: Didier Raboud 
Signed-off-by: Alex Deucher