linux.git/drivers/gpu/drm/amd/display/dmub/src, branch v5.8

drm/amd/display: move location of dmub_srv.h file

2020-05-05T17:12:33+00:00

[Why]
Make a separation of what belongs in the differen dmub
headers

dmub_srv.h is for exposing dmub srv interface to rest of
driver.

other headers inside dmub/inc exposes cmds and definitions
that are owned by the firmware

[How]
keep firmware owned definitions in dmub/inc

move stuff that is purely driver interface headers to dmub/
since those are interface calls that are defined for rest of
driver to use

Signed-off-by: Anthony Koo 
Reviewed-by: Aric Cyr 
Acked-by: Harry Wentland 
Acked-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher

drm/amd/display: Pass command instead of header into DMUB service

2020-04-28T20:19:05+00:00

[Why]
We read memory that we shouldn't be touching if the struct isn't
a full union dmub_rb_cmd.

[How]
Fix up all the callers and functions that take in the dmub_cmd_header
to use the dmub_rb_cmd instead.

Signed-off-by: Nicholas Kazlauskas 
Reviewed-by: Tony Cheng 
Acked-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher

drm/amd/display: Fix DMUB meta offset for new load method

2020-04-28T20:17:17+00:00

[Why]
The new metadata offset is located at the end of the firmware binary
without any additional padding.

Firmware state is currently larger than 1024 bytes so new firmware state
will hang when trying to access any data above 1024 bytes.

[How]
Specify the correct offset based on legacy vs new loading method.

Signed-off-by: Nicholas Kazlauskas 
Reviewed-by: Yongqiang Sun 
Acked-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher

drm/amd/display: Make DMCUB bss/data firmware blob optional

2020-04-09T14:43:17+00:00

[Why]
By moving everything out of .data into the other regions we can drop
the requirement for the second blob and unify it all into the inst/const
blob.

[How]
We need to still support the blob being there and not being there for
backwards compatibility.

Look for the DMCUB metadata section in the end of the inst/const blob
instead of bss/data is missing.

Clear CW2 if we don't have the data blob so we don't hang when
transitioning between data blob/blobless firmwares.

Don't memcpy the blob into CW2 region if it doesn't exist.

Signed-off-by: Nicholas Kazlauskas 
Reviewed-by: Tony Cheng 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: Implement abm config table copy to dmcub

2020-04-09T14:43:16+00:00

[Why]
Driver must pass abm config table to dmub fw. This provides various
parameters for abm functionality.

[How]
There is too much data to be passed in an inbox message, so we must pass
this data using an indirect buffer.  Copy the table to cw7 via x86,
driver copies to fw_state structure.

Signed-off-by: Wyatt Wood 
Reviewed-by: Nicholas Kazlauskas 
Acked-by: Rodrigo Siqueira 
Acked-by: Tony Cheng 
Signed-off-by: Alex Deucher

drm/amd/display: Allocate scratch space for DMUB CW7

2020-03-19T04:03:04+00:00

[Why]
The scratch space can be used to pass data between x86 and DMCUB.  DMCUB
will manage the actually mapping of CW7 internally, driver does not
program the window.

[How]
Allocate extra space within the DMUB service's framebuffer for this
scratch space and expose them from the service for use in DC.

Signed-off-by: Wyatt Wood 
Reviewed-by: Nicholas Kazlauskas 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: Wait for DMCUB to finish loading before executing commands

2020-02-25T16:03:15+00:00

[Why]
When we execute the first command for ASIC_INIT for command table
offloading we can hit a timing scenario such that the interrupts
for the inbox wptr haven't been enabled yet and the first command
is ignored until the second command is sent.

[How]
This happens when either the SCRATCH0 is already the correct status
code or autoload check is unsupported.

Clear SCRATCH0 during reset.

Also ensure that we don't accidentally reset the ASIC again in case
of a hang by clearing GPINT while we're at it.

Signed-off-by: Nicholas Kazlauskas 
Reviewed-by: Chris Park 
Acked-by: Rodrigo Siqueira 
Acked-by: Harry Wentland 
Signed-off-by: Alex Deucher

drm/amd/display: Use fb_base/fb_offset if available for translation

2020-02-11T16:51:01+00:00

[Why]
In the case where we do have these passed in then we should be using
these instead of the registers - those are only programmed when booting
the adapter as primary.

[How]
Check if fb_base/fb_offset are non-zero. The value of 0 is invalid
for fb_base but is valid for fb_offset on dGPU.

Signed-off-by: Nicholas Kazlauskas 
Reviewed-by: Aric Cyr 
Reviewed-by: Yongqiang Sun 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: Wait for clean shutdown in DMCUB reset

2020-02-06T20:04:37+00:00

[Why]
The DMCUB may be currently executing commands when the reset is
triggered.

Before issuing a reset we should first wait for the DMCUB to finish
its work.

[How]
Send the GPINT command for halting the firmware before reset.

Get the ack for the command then wait for the scratch register to
become the correct value.

We want this to take under ~40us or so at most before we force reset
to cover PHY delay sequence max time.

Each register read will be at least ~1-3us so don't bother using udelay.

Signed-off-by: Nicholas Kazlauskas 
Reviewed-by: Tony Cheng 
Acked-by: Bhawanpreet Lakha 
Signed-off-by: Alex Deucher

drm/amd/display: Add GPINT handler interface

2020-02-06T20:04:37+00:00

[Why]
The General Purpose Interrupt is used on the DMCUB to pass lightweight
commands via a register to the DMCUB.

This is limited to 32-bit command and 32-bit response.

This will be used for shutting down the firmware in a clean manner.

[How]
Add the command IDs and the data register to correctly format
the commands.

Add the interface functions to dmub_srv for sending and receiving the
commands.

Signed-off-by: Nicholas Kazlauskas 
Reviewed-by: Tony Cheng 
Acked-by: Bhawanpreet Lakha 
Signed-off-by: Alex Deucher