linux.git/drivers/gpu/drm/amd/display/dmub/src, branch for-next Linux kernel source tree drm/amd/display: Use region6 size in fw_meta_info 2024-11-08T16:45:30+00:00 JinZe Xu jinze.xu@amd.com 2024-10-18T14:15:57+00:00 e77a8005748547fb1f10645097f13ccdd804d7e5 [Why] If driver allocated region6 size is not same as the size in firmware, dmcub won't enable region6. [How] Use region6 size in dmcub_fw_meta instead of a constant value. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: JinZe Xu <jinze.xu@amd.com> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why]
If driver allocated region6 size is not same as the size in firmware,
dmcub won't enable region6.

[How]
Use region6 size in dmcub_fw_meta instead of a constant value.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: JinZe Xu <jinze.xu@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Remove inaccessible registers from DMU diagnostics 2024-11-04T16:35:22+00:00 Nicholas Kazlauskas nicholas.kazlauskas@amd.com 2024-10-23T16:53:37+00:00 69603bfcffc887fdfb5f8e877849e400958fb72d [Why] SEC_CNTL isn't readable by x86 and can block Z8 entry if read. [How] Remove the read. Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why]
SEC_CNTL isn't readable by x86 and can block Z8 entry if read.

[How]
Remove the read.

Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add a boot option to reduce phy ssc for HBR3 2024-10-28T20:32:29+00:00 Hansen Dsouza Hansen.Dsouza@amd.com 2024-10-15T21:33:15+00:00 69f22c5b454f7a3d77f323ed96b4ad6ac7bbe378 [Why] Spread on DPREFCLK by 0.3 percent can have a negative effect on sink when PHY SSC is also spread by 0.3 percent [How] Add boot option for DMU to lower PHY SSC Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Hansen Dsouza <Hansen.Dsouza@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why]
Spread on DPREFCLK by 0.3 percent can have a negative effect on sink
when PHY SSC is also spread by 0.3 percent
[How]
Add boot option for DMU to lower PHY SSC

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Hansen Dsouza <Hansen.Dsouza@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Restructure dpia link training 2024-09-18T20:15:07+00:00 Peichen Huang PeiChen.Huang@amd.com 2024-08-22T06:50:07+00:00 cf4cebcec619d963fa7496018f03cb0ff00dc257 [WHY] We intend to consolidate dp tunneling and conventional dp link training. [HOW] 1. Use the same link training entry for both dp and dpia 2. Move SET_CONFIG of non-transparent mode to dmub side 3. Add set_tps_notification dmub_cmd to notify tps request for non-transparent dpia link training 4. Check dpcd request result and abort link training early if dpia aux tunneling fails 5. Add option to avoid affect old product 6. Separately handle wait_time_microsec for dpia Reviewed-by: Cruise Hung <cruise.hung@amd.com> Reviewed-by: George Shen <george.shen@amd.com> Reviewed-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[WHY]
We intend to consolidate dp tunneling and conventional dp link training.

[HOW]
1. Use the same link training entry for both dp and dpia
2. Move SET_CONFIG of non-transparent mode to dmub side
3. Add set_tps_notification dmub_cmd to notify tps request for
   non-transparent dpia link training
4. Check dpcd request result and abort link training early if dpia
   aux tunneling fails
5. Add option to avoid affect old product
6. Separately handle wait_time_microsec for dpia

Reviewed-by: Cruise Hung <cruise.hung@amd.com>
Reviewed-by: George Shen <george.shen@amd.com>
Reviewed-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add logs for debugging outbox 2024-07-27T21:35:33+00:00 Cruise Cruise.Hung@amd.com 2024-07-18T04:55:02+00:00 c3f15273721f2ee60d32fc7d4f2c233a1eff47a8 The DP tunnel AUX reply is received through Outbox1. Print the Outbox1 status if an issue occurs. Signed-off-by: Cruise <Cruise.Hung@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
The DP tunnel AUX reply is received through Outbox1. Print the Outbox1
status if an issue occurs.

Signed-off-by: Cruise <Cruise.Hung@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add debug option for disabling SLDO optimizations 2024-07-01T20:10:35+00:00 Nicholas Kazlauskas nicholas.kazlauskas@amd.com 2024-06-17T19:45:51+00:00 ea04ef19ebdcd22e8a21054a19c2c8fefae011ce [Why] DM can hook this up to disable SLDO optimizations in firmware during DMCUB initialization for debug purposes. [How] Add the option and pass it through dmub_srv. Reviewed-by: Hansen Dsouza <hansen.dsouza@amd.com> Signed-off-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why]
DM can hook this up to disable SLDO optimizations in firmware during
DMCUB initialization for debug purposes.

[How]
Add the option and pass it through dmub_srv.

Reviewed-by: Hansen Dsouza <hansen.dsouza@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Remove register from DCN35 DMCUB diagnostic collection 2024-06-14T20:17:16+00:00 Nicholas Kazlauskas nicholas.kazlauskas@amd.com 2024-05-28T19:25:30+00:00 466423c6dd8af23ebb3a69d43434d01aed0db356 [Why] These registers should not be read from driver and triggering the security violation when DMCUB work times out and diagnostics are collected blocks Z8 entry. [How] Remove the register read from DCN35. Reviewed-by: Duncan Ma <duncan.ma@amd.com> Acked-by: Zaeem Mohamed <zaeem.mohamed@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why]
These registers should not be read from driver and triggering the
security violation when DMCUB work times out and diagnostics are
collected blocks Z8 entry.

[How]
Remove the register read from DCN35.

Reviewed-by: Duncan Ma <duncan.ma@amd.com>
Acked-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add outbox notification support for HPD redetect 2024-06-14T19:20:20+00:00 Nicholas Kazlauskas nicholas.kazlauskas@amd.com 2024-05-15T18:53:56+00:00 0db66572747a789922e8137904e8b4c39d9b94f6 [Why] HPD sense changes can occur during low power states and need to be notified from firmware to driver. Upon notification the hotplug redetection routines should execute. [How] Add Support in DMUB srv and DMUB srv stat for receiving these notifications. DM can hook them up and process the HPD redetection once received. Reviewed-by: Duncan Ma <duncan.ma@amd.com> Acked-by: Zaeem Mohamed <zaeem.mohamed@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why]
HPD sense changes can occur during low power states and need to be
notified from firmware to driver. Upon notification the hotplug
redetection routines should execute.

[How]
Add Support in DMUB srv and DMUB srv stat for receiving these
notifications. DM can hook them up and process the HPD redetection
once received.

Reviewed-by: Duncan Ma <duncan.ma@amd.com>
Acked-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Read default boot options 2024-05-13T19:47:59+00:00 Duncan Ma duncan.ma@amd.com 2024-04-22T14:17:11+00:00 fa73ec95c969c7af292caf622ef499e7af7cb062 [WHY] DPIA boot option is set by VBIOS. It gets overwritten when driver loads DMU. [HOW] Read PreOS boot options and determine if dpia is enabled. Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Duncan Ma <duncan.ma@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[WHY]
DPIA boot option is set by VBIOS. It gets
overwritten when driver loads DMU.

[HOW]
Read PreOS boot options and determine if
dpia is enabled.

Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Duncan Ma <duncan.ma@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Notify idle link detection through shared state 2024-04-30T13:57:17+00:00 Nicholas Kazlauskas nicholas.kazlauskas@amd.com 2024-04-18T13:51:36+00:00 5419a2076de1dd9b0b4a191d0dd07de7c4fa7040 [Why] We can hang in IPS2 checking DMCUB_SCRATCH0 for link detection state. [How] Replace the HW access with a check on the shared state bit. This will work the same way as the SCRATCH0 but won't require a wake in the case where link detection isn't required. Reviewed-by: Duncan Ma <duncan.ma@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why]
We can hang in IPS2 checking DMCUB_SCRATCH0 for link detection state.

[How]
Replace the HW access with a check on the shared state bit. This will
work the same way as the SCRATCH0 but won't require a wake in the case
where link detection isn't required.

Reviewed-by: Duncan Ma <duncan.ma@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>