linux.git/drivers/gpu/drm/amd/display/dc/resource, branch v6.8

drm/amd/display: Increase ips2_eval delay for DCN35

2024-02-15T19:18:43+00:00

[Why]
New worst-case measurement observed at 1897us.

[How]
Increase to 2000us to cover the new worst case + margin.

Reviewed-by: Ovidiu Bunea 
Acked-by: Aurabindo Pillai 
Signed-off-by: Nicholas Kazlauskas 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Implement bounds check for stream encoder creation in DCN301

2024-02-07T23:30:04+00:00

'stream_enc_regs' array is an array of dcn10_stream_enc_registers
structures. The array is initialized with four elements, corresponding
to the four calls to stream_enc_regs() in the array initializer. This
means that valid indices for this array are 0, 1, 2, and 3.

The error message 'stream_enc_regs' 4 <= 5 below, is indicating that
there is an attempt to access this array with an index of 5, which is
out of bounds. This could lead to undefined behavior

Here, eng_id is used as an index to access the stream_enc_regs array. If
eng_id is 5, this would result in an out-of-bounds access on the
stream_enc_regs array.

Thus fixing Buffer overflow error in dcn301_stream_encoder_create
reported by Smatch:
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn301/dcn301_resource.c:1011 dcn301_stream_encoder_create() error: buffer overflow 'stream_enc_regs' 4 <= 5

Fixes: 3a83e4e64bb1 ("drm/amd/display: Add dcn3.01 support to DC (v2)")
Cc: Roman Li 
Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
Reviewed-by: Roman Li 
Signed-off-by: Alex Deucher

drm/amd/display: Disable ODM by default for DCN35

2024-02-07T23:27:49+00:00

Just ensure that ODM optimization is disabled by default.

Acked-by: Hamza Mahfooz 
Signed-off-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: Increase eval/entry delay for DCN35

2024-02-07T23:21:27+00:00

[Why]
To match firmware measurements and avoid hanging when accessing HW
that's in idle.

[How]
Increase the delays to what we've measured.

Reviewed-by: Ovidiu Bunea 
Acked-by: Hamza Mahfooz 
Signed-off-by: Nicholas Kazlauskas 
Signed-off-by: Alex Deucher

drm/amd/display: set odm_combine_policy based on context in dcn32 resource

2024-02-07T23:16:46+00:00

[why]
When populating dml pipes, odm combine policy should be assigned based
on the pipe topology of the context passed in. DML pipes could be
repopulated multiple times during single validate bandwidth attempt. We
need to make sure that whenever we repopulate the dml pipes it is always
aligned with the updated context. There is a case where DML pipes get
repopulated during FPO optimization after ODM combine policy is changed.
Since in the current code we reinitlaize ODM combine policy, even though
the current context has ODM combine enabled, we overwrite it despite the
pipes are already split. This causes DML to think that MPC combine is
used so we mistakenly enable MPC combine because we apply pipe split
with ODM combine policy reset. This issue doesn't impact non windowed
MPO with ODM case because the legacy policy has restricted use cases. We
don't encounter the case where both ODM and FPO optimizations are
enabled together. So we decide to leave it as is because it is about to
be replaced anyway.

Cc: stable@vger.kernel.org # 6.6+
Reviewed-by: Chaitanya Dhere 
Reviewed-by: Alvin Lee 
Acked-by: Hamza Mahfooz 
Signed-off-by: Wenjing Liu 
Signed-off-by: Alex Deucher

drm/amd/display: revert "for FPO & SubVP/DRR config program vmin/max"

2024-01-09T20:43:53+00:00

This reverts commit 6b2b782ad6a25734ae847d1659bea3f613dbb563.

The original commit causes issues with certain features when DRR is
disabled, need to revisit this change later after resolving issues with
new DRR policy.

Reviewed-by: Rodrigo Siqueira 
Signed-off-by: Martin Leung 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Add some functions for Panel Replay

2024-01-03T16:16:05+00:00

[WHY]
Prepare for enabling the Panel Replay feature

[HOW]
- Add some Panel Replay setting functions in DC
- Add the Panel Replay resource in dcn35_resource.c
- Add debug masks for Panel Replay

Tested-by: Daniel Wheeler 
Acked-by: Rodrigo Siqueira 
Reviewed-by: Leo Li 
Signed-off-by: Tom Chung 
Signed-off-by: Alex Deucher

drm/amd/display: For FPO and SubVP/DRR configs program vmin/max sel

2024-01-03T15:47:20+00:00

For FPO and SubVP/DRR cases we need to ensure to program
OTG_V_TOTAL_MIN/MAX_SEL, otherwise stretching the vblank in FPO / SubVP
/ DRR cases will not have any effect and we could hit underflow /
corruption.

Tested-by: Daniel Wheeler 
Reviewed-by: Aric Cyr 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alvin Lee 
Signed-off-by: Alex Deucher

drm/amd/display: Don't allow FPO if no planes

2024-01-03T15:31:14+00:00

In DCN32/321 FPO uses per-pipe P-State force. If there is no plane, then
then HUBP is power gated, in which case any programming in HUBP has no
effect and the pipe is always asserting P-State allow. This is contrary
to what we want to happen for FPO (FW should moderate the P-State
assertion), so block FPO if there's no plane for the FPO pipe.

Tested-by: Daniel Wheeler 
Acked-by: Rodrigo Siqueira 
Reviewed-by: Samson Tam 
Reviewed-by: Chaitanya Dhere 
Signed-off-by: Alvin Lee 
Signed-off-by: Alex Deucher

drm/amd/display: enable dcn35 idle power optimization

2024-01-03T15:30:42+00:00

[Why]
Idle power optimization was disabled on dcn35 by default.

[How]
Enable by setting disable_idle_power_optimizations to false.

Signed-off-by: Roman Li 
Reviewed-by: Nicholas Kazlauskas 
Acked-by: Wayne Lin 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher