<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/gpu/drm/amd/display/dc/inc, branch master</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>drm/amd/display: Migrate color manager HW and fix MCM blend LUT issues</title>
<updated>2026-08-06T16:44:26+00:00</updated>
<author>
<name>Rafal Ostrowski</name>
<email>rafal.ostrowski@amd.com</email>
</author>
<published>2026-07-28T14:39:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=41951483258971e4f312275cddcdd2dad9fd48f5'/>
<id>41951483258971e4f312275cddcdd2dad9fd48f5</id>
<content type='text'>
Combine two related color manager improvements:

1. Migrate MCM/RMCM, shaper and 3DLUT HW programming to dc_plane_cm
   - Continue convergence with upstream Color Manager refactor
   - Migrate MCM/RMCM, shaper and 3DLUT programming for dcn401+ to dc_plane_cm
   - Unify MCM programming across both legacy and 3DLUT DMA paths
   - Add 3DLUT DMA broadcast support for multi-pipe planes

2. Reprogram MCM blend LUT on blend_enable falling edge
   - Fix issue where SDR desktop remained desaturated after video playback
   - Detect blend_enable falling edge (1-&gt;0) in surface update detection
   - Force MCM LUT reprogramming on blend state change

Reviewed-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Signed-off-by: Rafal Ostrowski &lt;rafal.ostrowski@amd.com&gt;
Signed-off-by: Roman Li &lt;roman.li@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Combine two related color manager improvements:

1. Migrate MCM/RMCM, shaper and 3DLUT HW programming to dc_plane_cm
   - Continue convergence with upstream Color Manager refactor
   - Migrate MCM/RMCM, shaper and 3DLUT programming for dcn401+ to dc_plane_cm
   - Unify MCM programming across both legacy and 3DLUT DMA paths
   - Add 3DLUT DMA broadcast support for multi-pipe planes

2. Reprogram MCM blend LUT on blend_enable falling edge
   - Fix issue where SDR desktop remained desaturated after video playback
   - Detect blend_enable falling edge (1-&gt;0) in surface update detection
   - Force MCM LUT reprogramming on blend state change

Reviewed-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Signed-off-by: Rafal Ostrowski &lt;rafal.ostrowski@amd.com&gt;
Signed-off-by: Roman Li &lt;roman.li@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Ensure dtbclk is enabled</title>
<updated>2026-08-06T13:58:19+00:00</updated>
<author>
<name>Charlene Liu</name>
<email>Charlene.Liu@amd.com</email>
</author>
<published>2026-06-30T19:56:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=807d6345bc8ee57dee1991e726d3aa012543b169'/>
<id>807d6345bc8ee57dee1991e726d3aa012543b169</id>
<content type='text'>
[why]
ensure dtbclk is enabled before hdmistreamclk_en

pmfw could stop dtbclk on idle.
driver needs to ensure dtbclk enabled is enabled before hdmistreamclk_en
also disable debounce timer on dcn42.

Reviewed-by: Chris Park &lt;chris.park@amd.com&gt;
Reviewed-by: Leo Chen &lt;leo.chen@amd.com&gt;
Signed-off-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Signed-off-by: Roman Li &lt;roman.li@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[why]
ensure dtbclk is enabled before hdmistreamclk_en

pmfw could stop dtbclk on idle.
driver needs to ensure dtbclk enabled is enabled before hdmistreamclk_en
also disable debounce timer on dcn42.

Reviewed-by: Chris Park &lt;chris.park@amd.com&gt;
Reviewed-by: Leo Chen &lt;leo.chen@amd.com&gt;
Signed-off-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Signed-off-by: Roman Li &lt;roman.li@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Enable DCN6 sources compilation</title>
<updated>2026-08-06T13:53:32+00:00</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2026-07-21T13:59:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=992694ad28584188725751f695a85661e8e3797a'/>
<id>992694ad28584188725751f695a85661e8e3797a</id>
<content type='text'>
- Add hooks in various entry points to perform hw/sw init for DCN6 asic
- Add dependent changes needed to enable DCN6 asic
- Update the Makefiles so that DCN6 related newly added sources are compiled

Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Roman Li &lt;Roman.Li@amd.com&gt;
Reviewed-by: Ivan Lipski &lt;ivan.lipski@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Add hooks in various entry points to perform hw/sw init for DCN6 asic
- Add dependent changes needed to enable DCN6 asic
- Update the Makefiles so that DCN6 related newly added sources are compiled

Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Roman Li &lt;Roman.Li@amd.com&gt;
Reviewed-by: Ivan Lipski &lt;ivan.lipski@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Register DCN as a PMFW DF C-state client on DCN42</title>
<updated>2026-07-28T22:37:42+00:00</updated>
<author>
<name>Leo Chen</name>
<email>leo.chen@amd.com</email>
</author>
<published>2026-07-09T18:47:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=53845307d52e383970f4255253780a8730f3d9be'/>
<id>53845307d52e383970f4255253780a8730f3d9be</id>
<content type='text'>
[Why]
DCN must not gate DF C-state locally via the DCHUBBUB ALLOW_SELF_REFRESH
controls: forcing a local "disallow" during MM-stutter re-entry can wedge the
fabric and hang boot. When DCN is disallowing c-state or has invalid watermarks
we should be explicit about it rather than using the watermark force selector.

[How]
Register DCN as a client of PMFW's DF C-state arbiter and signal over DALSMC
whether DCN permits DF C-state; PMFW allows DF C-state only once every client
(including DCN) has voted "allow".

- dc_clocks.cstate_allow: last DCN vote acked by PMFW
- clk_mgr_funcs::notify_cstate_disable(clk_mgr, disable)

prepare_bandwidth and headless dc_power_down_on_boot vote Allow;
hardware_release votes Disallow; init_clocks
(D0 entry) only clears the cache (cstate_allow) so the next allow re-syncs with
PMFW.

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Leo Chen &lt;leo.chen@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
DCN must not gate DF C-state locally via the DCHUBBUB ALLOW_SELF_REFRESH
controls: forcing a local "disallow" during MM-stutter re-entry can wedge the
fabric and hang boot. When DCN is disallowing c-state or has invalid watermarks
we should be explicit about it rather than using the watermark force selector.

[How]
Register DCN as a client of PMFW's DF C-state arbiter and signal over DALSMC
whether DCN permits DF C-state; PMFW allows DF C-state only once every client
(including DCN) has voted "allow".

- dc_clocks.cstate_allow: last DCN vote acked by PMFW
- clk_mgr_funcs::notify_cstate_disable(clk_mgr, disable)

prepare_bandwidth and headless dc_power_down_on_boot vote Allow;
hardware_release votes Disallow; init_clocks
(D0 entry) only clears the cache (cstate_allow) so the next allow re-syncs with
PMFW.

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Leo Chen &lt;leo.chen@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Wire probe commit path into dc_update_state</title>
<updated>2026-07-28T22:37:33+00:00</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2026-06-25T03:17:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=52771a3254eabb37de2d53aa7b623a5487776ee8'/>
<id>52771a3254eabb37de2d53aa7b623a5487776ee8</id>
<content type='text'>
[Why]
The dc_update_state commit interface and the dc_probe object model existed
but were not connected: there was no path to validate, commit, and program
a probe through the update pipeline, nor to read the result back. The
measurement waits on OTG frame edges and must not block fast updates.

[How]
- Move the per-commit scratch off dc_stream_state onto a dc-owned pool;
  acquire at init, release on cleanup or prepare failure, serialized by the
  DM global lock every commit path already holds.
- dc_update_state drives stream commits, probe-only commits, or both through
  one staged init/prepare/execute/cleanup loop with a null-arg guard. prepare
  releases the scratch slot on failure; cleanup releases it on success.
- Probe prepare installs the absolute probe set in place; execute calls the
  perfmon programming hook in the unlocked window and latches results.
- Add resource_validate_probe_set, a context-free achievability check shared
  by dc_validate_global_state (full update) and probe prepare (probe-only).
- dc_state_get_status gains a probe status class with a probe filter and a
  by-type mapping; dc_validation_set gains probes/probe_count. Drop the dead
  actual_* fields from struct dc_qos_info.

Reviewed-by: Dominik Kaszewski &lt;dominik.kaszewski@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
The dc_update_state commit interface and the dc_probe object model existed
but were not connected: there was no path to validate, commit, and program
a probe through the update pipeline, nor to read the result back. The
measurement waits on OTG frame edges and must not block fast updates.

[How]
- Move the per-commit scratch off dc_stream_state onto a dc-owned pool;
  acquire at init, release on cleanup or prepare failure, serialized by the
  DM global lock every commit path already holds.
- dc_update_state drives stream commits, probe-only commits, or both through
  one staged init/prepare/execute/cleanup loop with a null-arg guard. prepare
  releases the scratch slot on failure; cleanup releases it on success.
- Probe prepare installs the absolute probe set in place; execute calls the
  perfmon programming hook in the unlocked window and latches results.
- Add resource_validate_probe_set, a context-free achievability check shared
  by dc_validate_global_state (full update) and probe prepare (probe-only).
- dc_state_get_status gains a probe status class with a probe filter and a
  by-type mapping; dc_validation_set gains probes/probe_count. Drop the dead
  actual_* fields from struct dc_qos_info.

Reviewed-by: Dominik Kaszewski &lt;dominik.kaszewski@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Introduce program_perfmon hwss hook and BLS perfmon sequence</title>
<updated>2026-07-28T22:37:29+00:00</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2026-06-18T22:05:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=85df2884384beb20753e96e795f38621e9c465fa'/>
<id>85df2884384beb20753e96e795f38621e9c465fa</id>
<content type='text'>
[Why]
The hubbub perfmon peak-bandwidth path used a monolithic function
combining counter configuration and enable in one call, and wrote results
into a caller-supplied struct outside the dc_state model. A BLS-driven
approach builds the measurement from stateless primitives, gates it to OTG
frame boundaries, and stores results in dc_state.

[How]
- Rename the peak-BW vtable members from "unbounded_bandwidth" to
  "out_of_order_bandwidth" and split them into arm and start operations.
- Add the full set of perfmon BLS primitives - param structs, union
  members, enum entries, executors, and hwss_add_* builders - for reset,
  arm, every start_measuring_* and every get_* operation.
- Add dc_probe_status (valid, type, result union) plus probe_status[] to
  dc_state.
- Replace the measure_memory_qos hook with program_perfmon(dc, context),
  which writes results into probe_status[].
- dc_get_qos_info no longer calls the removed hook.

Reviewed-by: Dominik Kaszewski &lt;dominik.kaszewski@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
The hubbub perfmon peak-bandwidth path used a monolithic function
combining counter configuration and enable in one call, and wrote results
into a caller-supplied struct outside the dc_state model. A BLS-driven
approach builds the measurement from stateless primitives, gates it to OTG
frame boundaries, and stores results in dc_state.

[How]
- Rename the peak-BW vtable members from "unbounded_bandwidth" to
  "out_of_order_bandwidth" and split them into arm and start operations.
- Add the full set of perfmon BLS primitives - param structs, union
  members, enum entries, executors, and hwss_add_* builders - for reset,
  arm, every start_measuring_* and every get_* operation.
- Add dc_probe_status (valid, type, result union) plus probe_status[] to
  dc_state.
- Replace the measure_memory_qos hook with program_perfmon(dc, context),
  which writes results into probe_status[].
- dc_get_qos_info no longer calls the removed hook.

Reviewed-by: Dominik Kaszewski &lt;dominik.kaszewski@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Refactor dc_validation_set array into single root struct</title>
<updated>2026-07-28T22:37:23+00:00</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2026-06-17T14:30:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2ab5a13778265fe082050699ca0e921029a653f9'/>
<id>2ab5a13778265fe082050699ca0e921029a653f9</id>
<content type='text'>
[Why]
dc_validate_with_context() took a C array of per-stream elements plus a
separate count. This flat array cannot be extended to carry global objects
without widening the signature further.

[How]
Rename the per-stream element to dc_validation_stream, and make
dc_validation_set a root struct holding streams[MAX_STREAMS] and
stream_count. Update dc_validate_with_context() to take a single
const dc_validation_set * and propagate the new shape through all DC-layer
callers and helpers. Remove the never-implemented
dce112_validate_with_context declaration and the orphaned dce100
forward-declare.

No behavior change.

Reviewed-by: Dominik Kaszewski &lt;dominik.kaszewski@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
dc_validate_with_context() took a C array of per-stream elements plus a
separate count. This flat array cannot be extended to carry global objects
without widening the signature further.

[How]
Rename the per-stream element to dc_validation_stream, and make
dc_validation_set a root struct holding streams[MAX_STREAMS] and
stream_count. Update dc_validate_with_context() to take a single
const dc_validation_set * and propagate the new shape through all DC-layer
callers and helpers. Remove the never-implemented
dce112_validate_with_context declaration and the orphaned dce100
forward-declare.

No behavior change.

Reviewed-by: Dominik Kaszewski &lt;dominik.kaszewski@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Introduce dc_probe public object model</title>
<updated>2026-07-28T22:37:13+00:00</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2026-06-17T21:40:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7ae85e64d9e0e647247a732068251afaaa0d0595'/>
<id>7ae85e64d9e0e647247a732068251afaaa0d0595</id>
<content type='text'>
[Why]
Performance measurement needs to commit through the same update entry
point as planes and streams, with DM working against an abstraction of
what to measure rather than the hardware block that performs it.

[How]
Add dc_probe.h defining dc_probe_type (the measurable quantity),
dc_probe_target_state (not measuring / measuring / measured),
dc_probe_scope (global only, per-stream/plane deferred), and
dc_probe_state (an inline descriptor with copy semantics, no refcount).
dc_state carries the committed set as probes[MAX_PROBES] plus
probe_count. dc_state_update carries dc_probe_updates as the desired
absolute set that DC diffs against the committed set.

Reviewed-by: Dominik Kaszewski &lt;dominik.kaszewski@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
Performance measurement needs to commit through the same update entry
point as planes and streams, with DM working against an abstraction of
what to measure rather than the hardware block that performs it.

[How]
Add dc_probe.h defining dc_probe_type (the measurable quantity),
dc_probe_target_state (not measuring / measuring / measured),
dc_probe_scope (global only, per-stream/plane deferred), and
dc_probe_state (an inline descriptor with copy semantics, no refcount).
dc_state carries the committed set as probes[MAX_PROBES] plus
probe_count. dc_state_update carries dc_probe_updates as the desired
absolute set that DC diffs against the committed set.

Reviewed-by: Dominik Kaszewski &lt;dominik.kaszewski@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Split DPMS ON into parts</title>
<updated>2026-07-28T22:33:26+00:00</updated>
<author>
<name>Dominik Kaszewski</name>
<email>dominik.kaszewski@amd.com</email>
</author>
<published>2026-06-19T13:21:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=843049bac7c0a08c5263bed5a03f8fa23da19513'/>
<id>843049bac7c0a08c5263bed5a03f8fa23da19513</id>
<content type='text'>
[Why]
Ongoing optimization efforts require splitting DPMS ON around
enable_link, in order to enable running multiple sequences
in parallel.

[How]
* Split link_set_dpms_on across enable_link
* Add return value indicating whether the programming sequence
succeeded and/or run to the end.

Reviewed-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Signed-off-by: Dominik Kaszewski &lt;dominik.kaszewski@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
Ongoing optimization efforts require splitting DPMS ON around
enable_link, in order to enable running multiple sequences
in parallel.

[How]
* Split link_set_dpms_on across enable_link
* Add return value indicating whether the programming sequence
succeeded and/or run to the end.

Reviewed-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Signed-off-by: Dominik Kaszewski &lt;dominik.kaszewski@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Add updated MCIF ARB register definitions</title>
<updated>2026-07-28T22:32:32+00:00</updated>
<author>
<name>Dillon Varone</name>
<email>Dillon.Varone@amd.com</email>
</author>
<published>2026-06-22T15:42:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=889afb51af905e32e60827487a57bd380d9fa52c'/>
<id>889afb51af905e32e60827487a57bd380d9fa52c</id>
<content type='text'>
[WHY&amp;HOW]
DCN4+ use a new structure for MCIF arbiter registers.

Reviewed-by: Austin Zheng &lt;austin.zheng@amd.com&gt;
Signed-off-by: Dillon Varone &lt;Dillon.Varone@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[WHY&amp;HOW]
DCN4+ use a new structure for MCIF arbiter registers.

Reviewed-by: Austin Zheng &lt;austin.zheng@amd.com&gt;
Signed-off-by: Dillon Varone &lt;Dillon.Varone@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
