linux.git/drivers/gpu/drm/amd/display/dc/dsc, branch v6.6

drm/amd/display: Add link encoding to timing BW calculation parameters

2023-07-18T15:15:51+00:00

[Why]
There certain cases where the timing BW is dependent on the type of link
encoding in use. Thus to calculate the correct BW required for a given
timing, the link encoding should be added as a parameter.

Reviewed-by: Wenjing Liu 
Acked-by: Alan Liu 
Signed-off-by: George Shen 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Add stream overhead in BW calculations for 128b/132b

2023-07-18T15:15:45+00:00

[Why]
Current BW calculations do not account for the additional padding added
for uncompressed pixel-to-symbol packing.

This results in X.Y being too low for 128b/132b SST streams in certain
scenarios. If X.Y is too low, end user can observe image corruption.

[How]
Add function to calculate stream overhead to timing BW calculation for
128b/132b SST cases.

Reviewed-by: Wenjing Liu 
Acked-by: Alan Liu 
Signed-off-by: George Shen 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: drop redundant memset() in get_available_dsc_slices()

2023-06-09T14:38:37+00:00

get_available_dsc_slices() returns the number of indices set, and all of
the users of get_available_dsc_slices() don't cross the returned bound
when iterating over available_slices[]. So, the memset() in
get_available_dsc_slices() is redundant and can be dropped.

Fixes: 97bda0322b8a ("drm/amd/display: Add DSC support for Navi (v2)")
Reported-by: Christophe JAILLET 
Reviewed-by: Rodrigo Siqueira 
Signed-off-by: Hamza Mahfooz 
Signed-off-by: Alex Deucher

drm/amd/display: DSC policy override when ODM combine is forced

2023-04-18T20:28:52+00:00

[why]
When we force ODM combine with DSC, we lose several
8 bit and 10 bit modes in validation and thus
not able to use HDR. This is due to the number of
horizontal slices used in DSC not properly being
accounted for currently when 2:1 ODM Combine is forced.

[how]
Enforce at least two horizontal slices are used for DSC when
ODM combine is forced.

Reviewed-by: Nicholas Kazlauskas 
Acked-by: Qingqing Zhuo 
Signed-off-by: Nasir Osman 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: convert link.h functions to function pointer style

2023-03-14T19:35:03+00:00

[Why & How]
All dc subcomponents should call another dc component via function pointers
stored in a component structure. This is part of dc coding convention since
the beginning. The reason behind this is to improve encapsulation and
polymorphism. The function contract is extracted into a single link service
structure defined in link.h header file and implemented only in link_factory.c instead
of spreading across multiple files in link component file structure.

Reviewed-by: Jun Lei 
Acked-by: Qingqing Zhuo 
Signed-off-by: Wenjing Liu 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Rename DCN config to FP

2023-03-07T19:22:40+00:00

[Why & How]
The only reason we have the DCN config is for
floating point support. Rename it to make that
clear and (hopefully) avoid misuse of the config
in the future.

Reviewed-by: Rodrigo Siqueira 
Acked-by: Qingqing Zhuo 
Signed-off-by: Harry Wentland 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Build DSC without DCN config

2023-03-07T19:22:40+00:00

[Why & How]
DSC needs DCN but we are trying reduce the usage of the
DCN flag. It's easier to build the DSC code sprinkled
around DC core and the DMs and just guard the place where
DSC uses floating point code.

Since DSC is never enabled on non-DCN ASICs this won't
have any effect.

Reviewed-by: Hamza Mahfooz 
Acked-by: Qingqing Zhuo 
Signed-off-by: Harry Wentland 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: fix typo in dc_dsc_config_options structure

2023-03-07T19:22:39+00:00

[WHY]
There is a typo in dc_dsc_config_options structure

[HOW]
Fix the typo

Reviewed-by: Wenjing Liu 
Acked-by: Qingqing Zhuo 
Signed-off-by: Mike Hsieh 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Add height granularity limitation for dsc slice height calculation

2023-03-07T19:22:39+00:00

[WHY]
eDP add new limitation for Y granularity for selected update feature.
DSC does not include this limitation while calculating slice height.

[HOW]
Add new limitation while looking for DSC slice height.

Reviewed-by: Cruise Hung 
Acked-by: Qingqing Zhuo 
Signed-off-by: Mike Hsieh 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: add rc_params_override option in dc_dsc_config

2023-01-31T19:00:51+00:00

[why]
Current RC params are based on VESA recommended configurations.
Some DSC sink may prefer non standard rc params values due to
hardware limitations. To support those DSC sink we will allow DM to
optionally pass rc_params_ovrd in dc_dsc_config so DC will override
the default VESA recommended configurations.

Reviewed-by: Martin Leung 
Acked-by: Alex Hung 
Signed-off-by: Wenjing Liu 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher