linux.git/drivers/gpu/drm/amd/display/dc/dpp, branch master

drm/amd/display: Enable DCN6 sources compilation

2026-08-06T13:53:32+00:00

- Add hooks in various entry points to perform hw/sw init for DCN6 asic
- Add dependent changes needed to enable DCN6 asic
- Update the Makefiles so that DCN6 related newly added sources are compiled

Signed-off-by: Aurabindo Pillai 
Signed-off-by: Roman Li 
Reviewed-by: Ivan Lipski 
Tested-by: Dan Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Add new sources for DCN6

2026-08-06T13:48:29+00:00

Add DCN6 code to DC, DML2, and DMUB

Signed-off-by: Aurabindo Pillai 
Signed-off-by: Roman Li 
Reviewed-by: Ivan Lipski 
Tested-by: Dan Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: adjust floating point format for gamut remap when needed

2026-07-28T23:17:31+00:00

[Why]
The MPCCs different gamut remap matrices allow for S2D13 and S3D12 floating
point formats, but only S2D13 is used. There may be cases where more
integer bits are required.

[How]
Switch to S3D12 if any entries in the remap matrix cannot fit in S2D13.
Otherwise, prefer the extra precision of S2D13. Communicate the max value
that hw can support to dm via dc color caps.

Reviewed-by: Dillon Varone 
Signed-off-by: Clay King 
Signed-off-by: Fangzhi Zuo 
Tested-by: Dan Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Exit LS for ISHARP before coefficient write

2026-07-15T13:15:40+00:00

[Why]
The hardware programming guide indicates that we must exit LS before
any coefficient writes.

This is true across all ASIC for this block.

[How]
Drop the ips_v2 checks and unconditionall perform the update.
It is not based on IPS V2 support, which is set for DCN42, but rather
the presence of the block itself.

Reviewed-by: Charlene Liu 
Signed-off-by: Nicholas Kazlauskas 
Signed-off-by: George Zhang 
Signed-off-by: Alex Deucher

drm/amd/display: Deprecate DMUB register offload functionality

2026-06-17T20:08:41+00:00

[Why]
The DMUB register offload feature should no longer be used.
This was originally a debug feature for DCN21.
No longer applicable to the DMUB programming model.

[How]
Remove DMUB register offload infrastructure including helper
functions, structures, debug options, and register sequence macros.

Reviewed-by: Nicholas Kazlauskas 
Signed-off-by: Austin Zheng 
Signed-off-by: Aurabindo Pillai 
Tested-by: Dan Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Check for sharpening case when calculating max vtaps for scaler

2026-06-03T17:32:02+00:00

[Why & How]
- calc_lb_num_partitions has check when scaler is not enabled to use
 larger LB in calculations for max vtaps based on viewport being 1:1
- however, scaler is forced on when sharpening is enabled, so need
 to consider this in check
- taps is predetermined in spl_get_optimal_number_of_taps prior to
 calc_lb_num_partitions.  Add check for taps not 1 to handle
 sharpening case

Reviewed-by: Charlene Liu 
Signed-off-by: Samson Tam 
Signed-off-by: Ray Wu 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Fix assertion due to disable/enable CM blocks

2026-05-19T15:45:40+00:00

[why]
Some dc state transitions can result in CM blocks being disabled, then
re-enabled.  The disable will set a defer bit, but re-enable will not
clear it.  When optimizing later, an assert will be hit due to incorrect
expected HW state.

[how]
Clear defer bits if the block is re-enabled before optimization is
executed.

Reviewed-by: Alvin Lee 
Signed-off-by: Aric Cyr 
Signed-off-by: Ivan Lipski 
Tested-by: Dan Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Fix warnings

2026-05-11T20:10:34+00:00

[Why & How]
Fix various warnings related to unsigned/signed mismatches
-  Consistently use the same signedness for a given value
-  Explcitly cast between types when needed

Reviewed-by: Dillon Varone 
Signed-off-by: Clay King 
Signed-off-by: James Lin 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Fix type mismatches using guards and explicit casts

2026-05-05T13:56:52+00:00

[Why]
Address signed/unsigned comparison warnings across dc paths to keep
builds warning-clean and improve type safety at comparison boundaries.
Most warnings came from signed loop/index temporaries compared against
unsigned counters and table sizes, plus a smaller number of mixed
signed/unsigned clock, bandwidth, and geometry comparisons.

[How]
Aligned iterator and temporary variable types with the semantic type
of the compared bounds. Used unsigned indices for loops bounded by unsigned
counters and table sizes, while retaining signed types where values are
semantically signed or participate in arithmetic that may legitimately go
negative. Where mixed signed/unsigned comparisons are intentional, applied
explicit boundary casts or guarded comparisons instead of broad type
changes.

No functional behavior changes are intended; this is a warning-resolution
and type-alignment cleanup.

Reviewed-by: Dillon Varone 
Signed-off-by: Gaghik Khachatrian 
Signed-off-by: James Lin 
Signed-off-by: Alex Deucher

drm/amd/display: fix dual cursor shows on extend desktop

2026-04-28T18:27:26+00:00

[why & how]
when dpp pipe power gating disabled in driver, disable_pipe
did not disable cursor so next time as long as this pipe
powers up, it will be visible.

port dcn314 logic: disable cursor when it should be pipe pg.

Reviewed-by: Roman Li 
Signed-off-by: Charlene Liu 
Signed-off-by: Tom Chung 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher