<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c, branch v6.8</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>drm/amd/display: To adjust dprefclk by down spread percentage</title>
<updated>2024-01-09T20:43:53+00:00</updated>
<author>
<name>Martin Tsai</name>
<email>martin.tsai@amd.com</email>
</author>
<published>2023-12-18T08:36:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=17e74e11ac2b46e7514705ae7abfb93ac0e20bd6'/>
<id>17e74e11ac2b46e7514705ae7abfb93ac0e20bd6</id>
<content type='text'>
[Why]
Panels show corruption with high refresh rate timings when ssc is
enabled.

[How]
Read down-spread percentage from lut to adjust dprefclk. Issues come
from S0i3 with this commit has been fixed by SMU.

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Signed-off-by: Martin Tsai &lt;martin.tsai@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
Panels show corruption with high refresh rate timings when ssc is
enabled.

[How]
Read down-spread percentage from lut to adjust dprefclk. Issues come
from S0i3 with this commit has been fixed by SMU.

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Signed-off-by: Martin Tsai &lt;martin.tsai@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: switch DC over to the new DRM logging macros</title>
<updated>2023-09-26T21:00:21+00:00</updated>
<author>
<name>Hamza Mahfooz</name>
<email>hamza.mahfooz@amd.com</email>
</author>
<published>2023-09-20T17:38:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5d72e247e58c966f4e50cffebf0d414de7fc90ed'/>
<id>5d72e247e58c966f4e50cffebf0d414de7fc90ed</id>
<content type='text'>
For multi-GPU systems it is difficult to tell which GPU a particular
message is being printed for and that is undesirable because it
complicates debugging efforts. Also, the new macros allow us to enable
logging for particular parts of the codebase more selectively (since we
no longer need to throw everything at DRM_DEBUG_KMS()). So, for the
reasons outlined above we should switch to the new macros.

We can accomplish this by using the existing DC_LOGGER code to pass
around the relevant `struct drm_device` which will be fed to the new
macros in logger_types.h. Also, we must get rid of all instances of the
DC_LOG_.*() functions that are currently in amdgpu_dm since we don't use
the DC logger there and we can simply refer to the macros directly
there instead.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For multi-GPU systems it is difficult to tell which GPU a particular
message is being printed for and that is undesirable because it
complicates debugging efforts. Also, the new macros allow us to enable
logging for particular parts of the codebase more selectively (since we
no longer need to throw everything at DRM_DEBUG_KMS()). So, for the
reasons outlined above we should switch to the new macros.

We can accomplish this by using the existing DC_LOGGER code to pass
around the relevant `struct drm_device` which will be fed to the new
macros in logger_types.h. Also, we must get rid of all instances of the
DC_LOG_.*() functions that are currently in amdgpu_dm since we don't use
the DC logger there and we can simply refer to the macros directly
there instead.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: add dp dto programming function to dccg</title>
<updated>2023-09-11T21:17:17+00:00</updated>
<author>
<name>Dillon Varone</name>
<email>dillon.varone@amd.com</email>
</author>
<published>2023-08-24T16:19:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8e6302ebedd30a3990c6b9b9a9a51252abcd5d87'/>
<id>8e6302ebedd30a3990c6b9b9a9a51252abcd5d87</id>
<content type='text'>
[WHY&amp;HOW]
Add support for programming dp dto via dccg.

Reviewed-by: Jun Lei &lt;jun.lei@amd.com&gt;
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[WHY&amp;HOW]
Add support for programming dp dto via dccg.

Reviewed-by: Jun Lei &lt;jun.lei@amd.com&gt;
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Clean FPGA code in dc</title>
<updated>2023-06-09T14:44:11+00:00</updated>
<author>
<name>Qingqing Zhuo</name>
<email>qingqing.zhuo@amd.com</email>
</author>
<published>2023-03-16T13:05:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=25879d7b4986beba3f0d84762fe40d09fdc8b219'/>
<id>25879d7b4986beba3f0d84762fe40d09fdc8b219</id>
<content type='text'>
[Why]
Drop dead code for Linux.

[How]
Remove all IS_FPGA_MAXIMUS_DC and IS_DIAG_DC

Reviewed-by: Ariel Bernstein &lt;eric.bernstein@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
Drop dead code for Linux.

[How]
Remove all IS_FPGA_MAXIMUS_DC and IS_DIAG_DC

Reviewed-by: Ariel Bernstein &lt;eric.bernstein@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Add 90Mhz to video_optimized_pixel_rates</title>
<updated>2023-03-31T15:18:54+00:00</updated>
<author>
<name>Taimur Hassan</name>
<email>Syed.Hassan@amd.com</email>
</author>
<published>2023-03-14T21:39:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8ef23f9268fc4364fc79bd017c2ed6a6495133ec'/>
<id>8ef23f9268fc4364fc79bd017c2ed6a6495133ec</id>
<content type='text'>
[Why &amp; How]
Needed to get certain EDID to light up during TMDS compliance.

Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Taimur Hassan &lt;Syed.Hassan@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why &amp; How]
Needed to get certain EDID to light up during TMDS compliance.

Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Taimur Hassan &lt;Syed.Hassan@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Drop unnecessary DCN guards</title>
<updated>2023-03-07T19:22:40+00:00</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2023-02-13T22:58:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c186c13e65286a46b61f5c295f9f9c65c75c926e'/>
<id>c186c13e65286a46b61f5c295f9f9c65c75c926e</id>
<content type='text'>
[Why &amp; How]
DC is littered with many DCN guards that are not needed.
Drop them.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why &amp; How]
DC is littered with many DCN guards that are not needed.
Drop them.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Fix pixel clock programming</title>
<updated>2022-08-16T22:07:21+00:00</updated>
<author>
<name>Ilya Bakoulin</name>
<email>Ilya.Bakoulin@amd.com</email>
</author>
<published>2022-07-26T20:19:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=04fb918bf421b299feaee1006e82921d7d381f18'/>
<id>04fb918bf421b299feaee1006e82921d7d381f18</id>
<content type='text'>
[Why]
Some pixel clock values could cause HDMI TMDS SSCPs to be misaligned
between different HDMI lanes when using YCbCr420 10-bit pixel format.

BIOS functions for transmitter/encoder control take pixel clock in kHz
increments, whereas the function for setting the pixel clock is in 100Hz
increments. Setting pixel clock to a value that is not on a kHz boundary
will cause the issue.

[How]
Round pixel clock down to nearest kHz in 10/12-bpc cases.

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Brian Chang &lt;Brian.Chang@amd.com&gt;
Signed-off-by: Ilya Bakoulin &lt;Ilya.Bakoulin@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
Some pixel clock values could cause HDMI TMDS SSCPs to be misaligned
between different HDMI lanes when using YCbCr420 10-bit pixel format.

BIOS functions for transmitter/encoder control take pixel clock in kHz
increments, whereas the function for setting the pixel clock is in 100Hz
increments. Setting pixel clock to a value that is not on a kHz boundary
will cause the issue.

[How]
Round pixel clock down to nearest kHz in 10/12-bpc cases.

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Brian Chang &lt;Brian.Chang@amd.com&gt;
Signed-off-by: Ilya Bakoulin &lt;Ilya.Bakoulin@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Use correct DTO_SRC_SEL for 128b/132b encoding</title>
<updated>2022-07-25T21:16:45+00:00</updated>
<author>
<name>Michael Strauss</name>
<email>michael.strauss@amd.com</email>
</author>
<published>2022-06-09T14:45:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1c5a2fa97b91d37375f4fc8aeb37c9456c93c828'/>
<id>1c5a2fa97b91d37375f4fc8aeb37c9456c93c828</id>
<content type='text'>
[WHY]
DP DTO isn't used for 128b/132b encoding

[HOW]
Check current link rate to determine whether using 8b/10b or 128/132b encoding

Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[WHY]
DP DTO isn't used for 128b/132b encoding

[HOW]
Check current link rate to determine whether using 8b/10b or 128/132b encoding

Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Remove unused clk_src variable</title>
<updated>2022-07-25T13:31:02+00:00</updated>
<author>
<name>Maíra Canal</name>
<email>mairacanal@riseup.net</email>
</author>
<published>2022-07-14T16:44:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=557f9100c74cfa033488563240f567466613cefa'/>
<id>557f9100c74cfa033488563240f567466613cefa</id>
<content type='text'>
Remove the variable clk_src from the function dcn3_get_pix_clk_dividers.

This was pointed by clang with the following warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:1279:25: warning:
variable 'clk_src' set but not used [-Wunused-but-set-variable]
        struct dce110_clk_src *clk_src;
                               ^
1 warning generated.

Reviewed-by: André Almeida &lt;andrealmeid@igalia.com&gt;
Signed-off-by: Maíra Canal &lt;mairacanal@riseup.net&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove the variable clk_src from the function dcn3_get_pix_clk_dividers.

This was pointed by clang with the following warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:1279:25: warning:
variable 'clk_src' set but not used [-Wunused-but-set-variable]
        struct dce110_clk_src *clk_src;
                               ^
1 warning generated.

Reviewed-by: André Almeida &lt;andrealmeid@igalia.com&gt;
Signed-off-by: Maíra Canal &lt;mairacanal@riseup.net&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Move all linux includes into OS types</title>
<updated>2022-07-05T20:16:49+00:00</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2019-11-22T15:12:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=09de5cd2c170b19e04e37439a712da52a0535015'/>
<id>09de5cd2c170b19e04e37439a712da52a0535015</id>
<content type='text'>
Move all linux includes into OS types.

Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move all linux includes into OS types.

Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
