linux.git/drivers/gpu/drm/amd/display/dc/core, branch v5.16

drm/amd/display: Fix USB4 null pointer dereference in update_psp_stream_config

2021-12-28T21:51:24+00:00

[Why]
A porting error on a previous patch left the block of code that
causes the crash from a NULL pointer dereference.

More specifically, we try to access link_enc before it's assigned in
the USB4 case in the following assignment:

config.dio_output_idx = link_enc->transmitter - TRANSMITTER_UNIPHY_A;

[How]
That assignment occurs later depending on the ASIC version. It's only
needed on DCN31 and only after link_enc is already assigned.

Fixes: 986430446c917b ("drm/amd/display: fix a crash on USB4 over C20 PHY")
Reviewed-by: Harry Wentland 
Signed-off-by: Nicholas Kazlauskas 
Signed-off-by: Alex Deucher

drm/amd/display: Add work around for tunneled MST.

2021-12-01T22:06:38+00:00

[Why]
Certain USB4 docks do not seem to be able to handle disabling
DSC once it has been enabled on an MST stream. This can result
in blank displays.

[How]
As a work around, always enable DSC on docks exhibiting this issue. The
flag to indicate the use of DSC for MST streams on a USB4 dock is set
during detection of the dock and only cleared when the USB4 dock is
disconnected.

Reviewed-by: Jun Lei 
Reviewed-by: Aric Cyr 
Acked-by: Bhawanpreet Lakha 
Signed-off-by: Jimmy Kizito 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Fix for the no Audio bug with Tiled Displays

2021-12-01T22:06:06+00:00

[WHY]
It seems like after a series of plug/unplugs we end up in a situation
where tiled display doesnt support Audio.

[HOW]
The issue seems to be related to when we check streams changed after an
HPD, we should be checking the audio_struct as well to see if any of its
values changed.

Reviewed-by: Jun Lei 
Acked-by: Bhawanpreet Lakha 
Signed-off-by: Mustapha Ghaddar 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Clear DPCD lane settings after repeater training

2021-12-01T22:05:26+00:00

[Why]
VS and PE requested by repeater should not persist for the sink.

[How]
Clear DPCD lane settings after repeater link training finishes.

Reviewed-by: Wesley Chalmers 
Acked-by: Bhawanpreet Lakha 
Signed-off-by: George Shen 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Add comment where CONFIG_DRM_AMD_DC_DCN macro ends

2021-11-09T22:08:00+00:00

Trivial patch which adds a comment for macro
endif's in amdgpu_dm.c

Reviewed-by: Ariel Bernstein 
Reviewed-by: Harry Wentland 
Acked-by: Anson Jacob 
Tested-by: Daniel Wheeler 
Signed-off-by: Anson Jacob 
Signed-off-by: Alex Deucher

drm/amd/display: add condition check for dmub notification

2021-11-03T16:32:34+00:00

[Why & How]
In order to have dc_enable_dmub_notifications() more precise, add
one more condition to check if dc->debug.dpia_debug.bits.disable_dpia
is false.

Signed-off-by: Meenakshikumar Somasundaram 
Signed-off-by: Wayne Lin 
Signed-off-by: Aurabindo Pillai 
Reviewed-by: Nicholas Kazlauskas 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: fix register write sequence for LINK_SQUARE_PATTERN

2021-11-03T16:32:34+00:00

[why&how]
write LINK_SQUARE_PATTERN_num + 1 for square pulse pattern.
Specs requirement to write this register prior to write LINK_QUAL_LANEX_SET.

Acked-by: Aurabindo Pillai 
Signed-off-by: Wenjing Liu 
Reviewed-by: George Shen 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Clear encoder assignments when state cleared.

2021-11-03T16:32:34+00:00

[Why]
State can be cleared without removing individual streams (by
calling dc_remove_stream_from_ctx()). This can leave the
encoder assignment module in an incoherent state and cause
future assignments to be incorrect.

[How]
Clear encoder assignments when committing 0 streams or
re-initializing hardware.

Acked-by: Aurabindo Pillai 
Signed-off-by: Jimmy Kizito 
Reviewed-by: Jun Lei 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Force disable planes on any pipe split change

2021-11-03T16:32:34+00:00

[Why]
In scenario when 1 display connected with pipe split (2 pipes in use)
and 3 new displays simultaneously hotplugged via MST hub (4 pipes in use),
mpcc may get reprogram to other vtg, remaining busy.
In this case waiting for mpcc idle timeouts with error like this:
[drm] REG_WAIT timeout 1us * 100000 tries - mpc2_assert_idle_mpcc
RIP: 0010:mpc2_assert_mpcc_idle_before_connect
Call Trace:
dcn20_update_mpcc
dcn20_program_front_end_for_ctx
dc_commit_state
amdgpu_dm_atomic_commit_tail
...

[How]
Add pipe split change condition to disable dangling plane.

Acked-by: Aurabindo Pillai 
Signed-off-by: Roman Li 
Reviewed-by: Nicholas Kazlauskas 
Reviewed-by: Dmytro Laktyushkin 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: avoid link loss short pulse stuck the system

2021-11-03T16:32:34+00:00

[Why]
MST monitor sends link loss short pulse continuous but sink is
occupy by HDMI input to lead link training fail.

[How]
disable link once retraining fail.

Acked-by: Aurabindo Pillai 
Signed-off-by: Yu-ting Shen 
Reviewed-by: Wenjing Liu 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher