linux.git/drivers/gpu/drm/amd/display/dc/core, branch v5.10

drm/amd/display: Prevent bandwidth overflow

2020-12-09T15:06:39+00:00

[Why]
At very high pixel clock, bandwidth calculation exceeds 32 bit size
and overflow value. This causes the resulting selection of link rate
to be inaccurate.

[How]
Change order of operation and use fixed point to deal with integer
accuracy. Also address bug found when forcing link rate.

Signed-off-by: Chris Park 
Reviewed-by: Wenjing Liu 
Acked-by: Eryk Brol 
Signed-off-by: Alex Deucher

drm/amdgpu/display: remove DRM_AMD_DC_GREEN_SARDINE

2020-11-04T13:43:50+00:00

No need for a separate config option at this point.

Reviewed-by: Luben Tuikov 
Signed-off-by: Alex Deucher

drm/amd/display: Add green_sardine support to DC

2020-11-04T13:40:42+00:00

Display Core support for green_sardine

Signed-off-by: Roman Li 
Acked-by: Hersen Wu 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher

drm/amdgpu/display: use kvzalloc again in dc_create_state

2020-10-26T21:17:22+00:00

It looks this was accidently lost in a follow up patch.
dc context is large and we don't need contiguous pages.

Fixes: e4863f118a7d ("drm/amd/display: Multi display cause system lag on mode change")
Reviewed-by: Nicholas Kazlauskas 
Signed-off-by: Alex Deucher 
Cc: Aric Cyr 
Cc: Alex Xu 
Reported-by: Alex Xu (Hello71) 
Tested-by: Alex Xu (Hello71) 
Cc: stable@vger.kernel.org

drm/amd/display: Fix module load hangs when connected to an eDP

2020-10-14T19:22:46+00:00

It was recently introduced a change that enables driver to disable
streams if pixel clock changes. Consequently, the code path executed in
the disable vbios function expanded to an encoder verification part.
The encoder loop is nested inside the pipe count loop, and both loops
share the 'i' variable in control of their flow. This situation may lead
to an infinite loop because the encoder loop constantly updates the `i`
variable, making the first loop always positive. As a result, we can see
a soft hang during the module load (modprobe amdgpu) and a series of
dmesg log that looks like this:

kernel:[  124.538727] watchdog: BUG: soft lockup - CPU#2 stuck for 22s!
[modprobe:1000]

RSP: 0018:ffffabbf419bf0e8 EFLAGS: 00000282
RAX: ffffffffc0809de0 RBX: ffff93b35ccc0000 RCX: ffff93b366c21800
RDX: 0000000000000000 RSI: 0000000000000141 RDI: ffff93b35ccc0000
RBP: ffffabbf419bf108 R08: ffffabbf419bf164 R09: 0000000000000001
R10: 0000000000000003 R11: 0000000000000003 R12: 0000000008677d40
R13: 0000000000000141 R14: ffff93b35cfc0000 R15: ffff93b35abc0000
FS:  00007f1400717540(0000) GS:ffff93b37f680000(0000)
     knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 00005649b66b0968 CR3: 00000003e0fec000 CR4: 0000000000350ee0
Call Trace:
 amdgpu_device_rreg+0x17/0x20 [amdgpu]
 amdgpu_cgs_read_register+0x14/0x20 [amdgpu]
 dm_read_reg_func+0x3a/0xb0 [amdgpu]
 get_pixel_clk_frequency_100hz+0x30/0x50 [amdgpu]
 dc_commit_state+0x8f1/0xae0 [amdgpu]
 ? drm_calc_timestamping_constants+0x101/0x160 [drm]
 amdgpu_dm_atomic_commit_tail+0x39d/0x21a0 [amdgpu]
 ? dcn21_validate_bandwidth+0xe5/0x290 [amdgpu]
 ? kfree+0xc3/0x390
 ? dcn21_validate_bandwidth+0xe5/0x290 [amdgpu]
...
RSP: 002b:00007fff26009bd8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139
RAX: ffffffffffffffda RBX: 000055a8025bea50 RCX: 00007f140085c89d
RDX: 0000000000000000 RSI: 000055a8025b8290 RDI: 000000000000000c
RBP: 0000000000040000 R08: 0000000000000000 R09: 0000000000000000
R10: 000000000000000c R11: 0000000000000246 R12: 000055a8025b8290
R13: 0000000000000000 R14: 000055a8025bead0 R15: 000055a8025bea50

This issue was fixed by introducing a second variable for the internal
loop.

Fixes: 8353d30e747f4e ("drm/amd/display: disable stream if pixel clock changed with link active")
Reviewed-by: Roman Li 
Reviewed-by: Nicholas Kazlauskas 
Signed-off-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: HDMI remote sink need mode validation for Linux

2020-10-05T19:13:55+00:00

[Why]
Currently mode validation is bypassed if remote sink exists. That
leads to mode set issue when a BW bottle neck exists in the link path,
e.g., a DP-to-HDMI converter that only supports HDMI 1.4.

Any invalid mode passed to Linux user space will cause the modeset
failure due to limitation of Linux user space implementation.

[How]
Mode validation is skipped only if in edid override. For real remote
sink, clock limit check should be done for HDMI remote sink.

Have HDMI related remote sink going through mode validation to
elimiate modes which pixel clock exceeds BW limitation.

Signed-off-by: Fangzhi Zuo 
Reviewed-by: Hersen Wu 
Acked-by: Eryk Brol 
Signed-off-by: Alex Deucher

drm/amd/display: make get_color_space_type() static

2020-09-29T20:11:35+00:00

This addresses the following sparse warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_hw_sequencer.c:180:26:
warning: symbol 'get_color_space_type' was not declared. Should it be
static?

Reviewed-by: Harry Wentland 
Reported-by: Hulk Robot 
Signed-off-by: Jason Yan 
Signed-off-by: Alex Deucher

drm/amd/display: disable stream if pixel clock changed with link active

2020-09-29T20:11:13+00:00

[Why]
Vbios uses preferred timing to turn on edp but OS could use other
timing.  If change pixel clock when link active, there is unexpected
garbage on monitor.

[How]
Once pixel clock changed, the driver needs to disable stream.

Signed-off-by: Chiawen Huang 
Reviewed-by: Tony Cheng 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: Revert check for flip pending before locking pipes

2020-09-29T20:09:05+00:00

Signed-off-by: Aric Cyr 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: Add debug param to force dio disable

2020-09-29T20:08:59+00:00

[WHY]
At the moment, some tests are failing because cur_link_settings is
invalid. As a workaround, add an option to force dio disable.

Signed-off-by: Wesley Chalmers 
Reviewed-by: Martin Leung 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher