linux.git/drivers/gpu/drm/amd/display/dc/calcs, branch v5.7

drm/amdgpu/display: Fix Pollock Variant Detection

2020-03-09T17:51:03+00:00

Problem Description:
Currently we are checking internal fused rev id with pci rev id. However, fused
internal rev id is the same on all raven2 parts (in which Dali and Pollock were
based on too), thus Pollock detection fails

Fix:
use the pci rev to preform the detection for bandwidth calculations.

Reviewed-by: Feifei Xu 
Signed-off-by: Aly-Tawfik 
Signed-off-by: Alex Deucher

drm/amd/display: fix indentation issue on a hunk of code

2020-03-05T05:26:55+00:00

There are multiple statements that are indented incorrectly. Add
in the missing tabs.

Signed-off-by: Colin Ian King 
Signed-off-by: Alex Deucher

drm/amd/display: Fix RV2 Variant Detection

2020-02-25T16:09:12+00:00

[WHY]
RV2 and variants are indistinguishable by hw internal rev alone, need to
be distinguishable in order to correctly set max vlevel.  Previous
detection change incorrectly checked for hw internal rev.

[HOW]
Use pci revision to check if RV2 or low power variant Correct a few
overlapping ASICREV range checks

Signed-off-by: Michael Strauss 
Reviewed-by: Michael Strauss 
Acked-by: Rodrigo Siqueira 
Acked-by: Harry Wentland 
Signed-off-by: Alex Deucher

drm/amdgpu/display: handle multiple numbers of fclks in dcn_calcs.c (v2)

2020-02-04T15:37:52+00:00

We might get different numbers of clocks from powerplay depending
on what the OEM has populated.

v2: add assert for at least one level

Bug: https://gitlab.freedesktop.org/drm/amd/issues/963
Reviewed-by: Nicholas Kazlauskas 
Signed-off-by: Alex Deucher

drm/amd/display: fixup DML dependencies

2020-01-16T19:16:48+00:00

[why]
Need to fix DML portability issues to enable SW unit testing around DML

[how]
Move calcs into dc include folder since multiple components reference it
Remove relative paths to external dependencies

Signed-off-by: Jun Lei 
Reviewed-by: Anthony Koo 
Acked-by: Harry Wentland 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: add Pollock IDs, fix Pollock & Dali clk mgr construct

2020-01-14T15:18:10+00:00

[WHY]
Only a single voltage level should be available to Pollock (min level)
Pollock & Dali get misidentified as Renoir, use wrong clk mgr constructor

[HOW]
Add provided Pollock IDs to ASIC Rev. ID list.
Create new Pollock ASIC RID check, fix RV2 & Dali ASIC checks.
Check RID and set max voltage level to 0 if Pollock is detected.
Work around broken ASICREV_IS_RENOIR, IS_RAVEN2, etc. checks by
performing Dali/Pollock checks before they can be misidentified as RN.

Signed-off-by: Michael Strauss 
Signed-off-by: Bhawanpreet Lakha 
Reviewed-by: Huang Rui 
Signed-off-by: Alex Deucher

drm/amd/display: use true, false for bool variable in dce_calcs.c

2020-01-07T16:56:31+00:00

Fixes coccicheck warning:

drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:157:46-64: WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:159:2-20: WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:161:46-64: WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:163:2-20: WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:289:1-12: WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:290:1-12: WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:341:3-14: WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:343:4-15: WARNING: Assignment of 0/1 to bool variable

Reported-by: Hulk Robot 
Signed-off-by: zhengbin 
Signed-off-by: Alex Deucher

amdgpu: Enable initial DCN support on POWER

2019-12-18T21:09:05+00:00

DCN requires floating point support to operate.  Add the appropriate
x86/ppc64 guards and FPU / AltiVec / VSX context switches to DCN.

Note that the current DC20 code doesn't contain all required FPU
wrappers on x86 or POWER, so this patch is insufficient to fully
enable DC20 on POWER.

v2: s/X86_64/X86/g to retain previous behavior.

Signed-off-by: Timothy Pearson 
Signed-off-by: Alex Deucher

amdgpu: Prepare DCN floating point macros for generic arch support

2019-12-18T21:09:05+00:00

Introduce DC_FP_START()/DC_FP_END() macros to help enable floating
point kernel mode support across various architectures.

v2: move copyright update to commit which adds the changes

Signed-off-by: Timothy Pearson 
Signed-off-by: Alex Deucher

Merge tag 'drm-next-5.6-2019-12-11' of git://people.freedesktop.org/~agd5f/linux into drm-next

2019-12-17T17:47:46+00:00

drm-next-5.6-2019-12-11:

amdgpu:
- Add MST atomic routines
- Add support for DMCUB (new helper microengine for displays)
- Add OEM i2c support in DC
- Use vstartup for vblank events on DCN
- Simplify Kconfig for DC
- Renoir fixes for DC
- Clean up function pointers in DC
- Initial support for HDCP 2.x
- Misc code cleanups
- GFX10 fixes
- Rework JPEG engine handling for VCN
- Add clock and power gating support for JPEG
- BACO support for Arcturus
- Cleanup PSP ring handling
- Add framework for using BACO with runtime pm to save power
- Move core pci state handling out of the driver for pm ops
- Allow guest power control in 1 VF case with SR-IOV
- SR-IOV fixes
- RAS fixes
- Support for power metrics on renoir
- Golden settings updates for gfx10
- Enable gfxoff on supported navi10 skus
- Update MAINTAINERS

amdkfd:
- Clean up generational gfx code
- Fixes for gfx10
- DIQ fixes
- Share more code with amdgpu

radeon:
- PPC DMA fix
- Register checker fixes for r1xx/r2xx
- Misc cleanups

From: Alex Deucher 
Link: https://patchwork.freedesktop.org/patch/msgid/20191211223020.7510-1-alexander.deucher@amd.com