<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/gpu/drm/amd/display/dc/Makefile, branch v5.10</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>drm/amd/display: dc/dce: add initial DCE6 support (v10)</title>
<updated>2020-07-27T20:45:51+00:00</updated>
<author>
<name>Mauro Rossi</name>
<email>issor.oruam@gmail.com</email>
</author>
<published>2020-07-11T19:43:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7c15fd86aaec3e602e140c242369df2baddc865e'/>
<id>7c15fd86aaec3e602e140c242369df2baddc865e</id>
<content type='text'>
[Why]
DCE6 chipsets have a lot in common with DCE8, let's start from this

[How]
DCE6 targets are added replicating existing DCE8 implementation.

NOTE: dce_8_0_{d,sh_mask}.h headers used instead of dce_6_0_{d,sh_mask}.h
initial build prototype due to missing DCE6 macros/registers/masks
DCE6 specific macros/registers/masks will be added with later commits

(v2b) removed dce_version cases in dc/dce/dce_clock_source.c and
     updated dce60 due to following kernel 5.0 commits:
     24f7dd7 ("drm/amd/display: move pplib/smu notification to dccg block")
     9566b67 ("drm/amd/display: remove safe_to_lower flag from dc, use 2 functions instead")
     4244381 ("drm/amd/display: clean up base dccg struct")
     4c5e8b5 ("drm/amd/display: split dccg clock manager into asic folders")
     84e7fc0 ("drm/amd/display: rename dccg to clk_mgr")
     77f6916 ("drm/amd/display: Remove duplicate header")
     9f7ddbe ("drm/amd/display: fix optimize_bandwidth func pointer for dce80")
     4ece61a ("drm/amd/display: set clocks to 0 on suspend on dce80")

(v3b) updated dce60 due to following kernel 5.1 commits:
     380604e ("drm/amd/display: Use 100 Hz precision for pipe pixel clocks")
     32e6136 ("drm/amd/display: Fix 64-bit division for 32-bit builds")
     1877ccf ("drm/amd/display: Change from aux_engine to dce_aux")
     c69dffa ("drm/amd/display: fix eDP fast bootup for pre-raven asic")

(v4b) updated dce60 due to following kernel 5.2 commits:
     e5c4197 ("drm/amd/display: Add plane capabilities to dc_caps")
     813d20d ("drm/amd/display: Fix multi-thread writing to 1 state")
     ea36ad3 ("drm/amd/display: expand plane caps to include fp16 and scaling capability")
     afcd526 ("drm/amd/display: Add fast_validate parameter")

(v5b) updated dce60 due to following kernel 5.3 commits:
     e7e10c4 ("drm/amd/display: stop external access to internal optc sync params")
     78cc70b ("drm/amd/display: Engine-specific encoder allocation")
     dc88b4a ("drm/amd/display: make clk mgr soc specific")
     4fc4dca ("drm/amd: drop use of drmp.h in os_types.h")

(v6b) updated dce60 due to following kernel 5.4 commits:
     54a9bcb ("drm/amd/display: Fix a typo - dce_aduio_mask --&gt; dce_audio_mask")
     9adc805 ("drm/amd/display: make firmware info only load once during dc_bios create")

(v7b) updated dce60 due to following kernel 5.5 commits:
     cabe144 ("drm/amd/display: memory leak")
     8276dd8 ("drm/amd/display: update register field access mechanism")
     f6040a4 ("drm/amd/display: configurable aux timeout support")
     bf7f5ac ("drm/amd/display: map TRANSMITTER_UNIPHY_x to LINK_REGS_x")

(v8b) updated dce60 due to following kernel 5.6 commits:
     d9e3267 ("drm/amd/display: cleanup of construct and destruct funcs")
     f42ea55 ("drm/amd/display: add separate of private hwss functions")

(v9b) updated dce60 due to following kernel 5.8 commits:
     bba8289 ("drm/amd/display: code clean up in dce80_hw_sequencer.c")
     904fb6e ("drm/amd/display: move panel power seq to new panel struct")
     d4caa72 ("drm/amd/display: change from panel to panel cntl")

(v10) Fix up PLL handling for DCE6:
     DCE6.0 supports 2 PLLs.  DCE6.1 supports 3 PLLs. (Alex)

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Mauro Rossi &lt;issor.oruam@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
DCE6 chipsets have a lot in common with DCE8, let's start from this

[How]
DCE6 targets are added replicating existing DCE8 implementation.

NOTE: dce_8_0_{d,sh_mask}.h headers used instead of dce_6_0_{d,sh_mask}.h
initial build prototype due to missing DCE6 macros/registers/masks
DCE6 specific macros/registers/masks will be added with later commits

(v2b) removed dce_version cases in dc/dce/dce_clock_source.c and
     updated dce60 due to following kernel 5.0 commits:
     24f7dd7 ("drm/amd/display: move pplib/smu notification to dccg block")
     9566b67 ("drm/amd/display: remove safe_to_lower flag from dc, use 2 functions instead")
     4244381 ("drm/amd/display: clean up base dccg struct")
     4c5e8b5 ("drm/amd/display: split dccg clock manager into asic folders")
     84e7fc0 ("drm/amd/display: rename dccg to clk_mgr")
     77f6916 ("drm/amd/display: Remove duplicate header")
     9f7ddbe ("drm/amd/display: fix optimize_bandwidth func pointer for dce80")
     4ece61a ("drm/amd/display: set clocks to 0 on suspend on dce80")

(v3b) updated dce60 due to following kernel 5.1 commits:
     380604e ("drm/amd/display: Use 100 Hz precision for pipe pixel clocks")
     32e6136 ("drm/amd/display: Fix 64-bit division for 32-bit builds")
     1877ccf ("drm/amd/display: Change from aux_engine to dce_aux")
     c69dffa ("drm/amd/display: fix eDP fast bootup for pre-raven asic")

(v4b) updated dce60 due to following kernel 5.2 commits:
     e5c4197 ("drm/amd/display: Add plane capabilities to dc_caps")
     813d20d ("drm/amd/display: Fix multi-thread writing to 1 state")
     ea36ad3 ("drm/amd/display: expand plane caps to include fp16 and scaling capability")
     afcd526 ("drm/amd/display: Add fast_validate parameter")

(v5b) updated dce60 due to following kernel 5.3 commits:
     e7e10c4 ("drm/amd/display: stop external access to internal optc sync params")
     78cc70b ("drm/amd/display: Engine-specific encoder allocation")
     dc88b4a ("drm/amd/display: make clk mgr soc specific")
     4fc4dca ("drm/amd: drop use of drmp.h in os_types.h")

(v6b) updated dce60 due to following kernel 5.4 commits:
     54a9bcb ("drm/amd/display: Fix a typo - dce_aduio_mask --&gt; dce_audio_mask")
     9adc805 ("drm/amd/display: make firmware info only load once during dc_bios create")

(v7b) updated dce60 due to following kernel 5.5 commits:
     cabe144 ("drm/amd/display: memory leak")
     8276dd8 ("drm/amd/display: update register field access mechanism")
     f6040a4 ("drm/amd/display: configurable aux timeout support")
     bf7f5ac ("drm/amd/display: map TRANSMITTER_UNIPHY_x to LINK_REGS_x")

(v8b) updated dce60 due to following kernel 5.6 commits:
     d9e3267 ("drm/amd/display: cleanup of construct and destruct funcs")
     f42ea55 ("drm/amd/display: add separate of private hwss functions")

(v9b) updated dce60 due to following kernel 5.8 commits:
     bba8289 ("drm/amd/display: code clean up in dce80_hw_sequencer.c")
     904fb6e ("drm/amd/display: move panel power seq to new panel struct")
     d4caa72 ("drm/amd/display: change from panel to panel cntl")

(v10) Fix up PLL handling for DCE6:
     DCE6.0 supports 2 PLLs.  DCE6.1 supports 3 PLLs. (Alex)

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Mauro Rossi &lt;issor.oruam@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Add DCN3 blocks to Makefile</title>
<updated>2020-07-01T05:59:15+00:00</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2020-05-25T17:18:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e77165bf7b02a3c01819a209c6c569850254c020'/>
<id>e77165bf7b02a3c01819a209c6c569850254c020</id>
<content type='text'>
Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: rename DCN1_0 kconfig to DCN</title>
<updated>2019-11-13T20:29:44+00:00</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2019-11-06T19:48:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b86a1aa36a92bcfbc062c5e99c1d084f27f25bab'/>
<id>b86a1aa36a92bcfbc062c5e99c1d084f27f25bab</id>
<content type='text'>
Since dcn20 and dcn21 are under dcn1 it doesnt make sense to
have it named dcn1.

Change it to "dcn" to make it generic

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Since dcn20 and dcn21 are under dcn1 it doesnt make sense to
have it named dcn1.

Change it to "dcn" to make it generic

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flag</title>
<updated>2019-11-13T20:29:44+00:00</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2019-11-06T19:44:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=aca935c7cc866a935a61769c9e9782dd834a8502'/>
<id>aca935c7cc866a935a61769c9e9782dd834a8502</id>
<content type='text'>
[Why]

DCN21 is stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The following commands were executed
in sequence:

$ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';'
$ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';'

In addition:

* Remove from kconfig, and replace any dependencies with DCN1_0.
* Remove from any makefiles.
* Fix and cleanup Renoir definitions in dal_asic_id.h
* Expand DCN1 ifdef to include DCN21 code in the following files:
    * clk_mgr/clk_mgr.c: dc_clk_mgr_create()
    * core/dc_resources.c: dc_create_resource_pool()
    * gpio/hw_factory.c: dal_hw_factory_init()
    * gpio/hw_translate.c: dal_hw_translate_init()

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]

DCN21 is stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The following commands were executed
in sequence:

$ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';'
$ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';'

In addition:

* Remove from kconfig, and replace any dependencies with DCN1_0.
* Remove from any makefiles.
* Fix and cleanup Renoir definitions in dal_asic_id.h
* Expand DCN1 ifdef to include DCN21 code in the following files:
    * clk_mgr/clk_mgr.c: dc_clk_mgr_create()
    * core/dc_resources.c: dc_create_resource_pool()
    * gpio/hw_factory.c: dal_hw_factory_init()
    * gpio/hw_translate.c: dal_hw_translate_init()

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED</title>
<updated>2019-11-13T20:29:44+00:00</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2019-11-06T19:38:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1da37801a8b0fffb024fea594c7f1d7867ed8aa0'/>
<id>1da37801a8b0fffb024fea594c7f1d7867ed8aa0</id>
<content type='text'>
[Why]

DCN2 and DSC are stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The following commands were executed
in sequence:

$ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';'
$ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';'

In addition:

* Remove from kconfig, and replace any dependencies with DCN1_0.
* Remove from any makefiles.
* Fix and cleanup NV defninitions in dal_asic_id.h
* Expand DCN1 ifdef to include DCN2 code in the following files:
    * clk_mgr/clk_mgr.c: dc_clk_mgr_create()
    * core/dc_resources.c: dc_create_resource_pool()
    * dce/dce_dmcu.c: dcn20_*lock_phy()
    * dce/dce_dmcu.c: dcn20_funcs
    * dce/dce_dmcu.c: dcn20_dmcu_create()
    * gpio/hw_factory.c: dal_hw_factory_init()
    * gpio/hw_translate.c: dal_hw_translate_init()

Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]

DCN2 and DSC are stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The following commands were executed
in sequence:

$ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';'
$ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';'

In addition:

* Remove from kconfig, and replace any dependencies with DCN1_0.
* Remove from any makefiles.
* Fix and cleanup NV defninitions in dal_asic_id.h
* Expand DCN1 ifdef to include DCN2 code in the following files:
    * clk_mgr/clk_mgr.c: dc_clk_mgr_create()
    * core/dc_resources.c: dc_create_resource_pool()
    * dce/dce_dmcu.c: dcn20_*lock_phy()
    * dce/dce_dmcu.c: dcn20_funcs
    * dce/dce_dmcu.c: dcn20_dmcu_create()
    * gpio/hw_factory.c: dal_hw_factory_init()
    * gpio/hw_translate.c: dal_hw_translate_init()

Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Drop CONFIG_DRM_AMD_DC_DMUB guards</title>
<updated>2019-11-13T20:29:42+00:00</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2019-10-28T13:22:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2200eb9e1819aabb9a1c24d5f6b132f389a2e8a9'/>
<id>2200eb9e1819aabb9a1c24d5f6b132f389a2e8a9</id>
<content type='text'>
[Why]
Support for DMUB only depends on support for DC. It doesn't use floating
point so we don't need to guard it by any specific DCN revision.

[How]
Drop the guards and cleanup the newlines around each one.

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
Support for DMUB only depends on support for DC. It doesn't use floating
point so we don't need to guard it by any specific DCN revision.

[How]
Drop the guards and cleanup the newlines around each one.

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Add DMUB support to DC</title>
<updated>2019-11-13T20:29:42+00:00</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2019-10-25T19:03:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3a1627b07385a6bb497f7ca4e2ffe1e1dbc70b68'/>
<id>3a1627b07385a6bb497f7ca4e2ffe1e1dbc70b68</id>
<content type='text'>
DC will use DMUB for command submission and flow control during
initialization.

Register offloading as well as submitting some BIOS commands are part
of the DC internal interface but are guarded behind debug options.

It won't be functional in amdgpu_dm yet since we don't pass the
DMUB service to DC for use.

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
DC will use DMUB for command submission and flow control during
initialization.

Register offloading as well as submitting some BIOS commands are part
of the DC internal interface but are guarded behind debug options.

It won't be functional in amdgpu_dm yet since we don't pass the
DMUB service to DC for use.

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Add HDCP module</title>
<updated>2019-10-03T14:10:58+00:00</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2019-08-06T21:52:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4c283fdac08abf3211533f70623c90a34f41d08d'/>
<id>4c283fdac08abf3211533f70623c90a34f41d08d</id>
<content type='text'>
This module manages HDCP for amdgpu driver. The module behaves as a
state machine which handles the different authentication states of HDCP

The module is divided into 3 major components
+--------+
| Hdcp.c |
+--------+
Manages the state machine, sends the events to be executed and communicates
with the dm

+-----------+
|Execution.c|
+-----------+
This executes events based on the current state. Also generates
execution results as transition inputs

+------------+
|Transition.c|
+------------+
Decides the next state based on the input and makes requests to
hdcp.c to handle.
                                +-------------+
                        ------&gt; | Execution.c | ------
                        |       +-------------+       |
                        |                             V
+----+              +--------+                 +--------------+
| DM |    -----&gt;    | Hdcp.c |  &lt;------------  | Transition.c |
+----+    &lt;-----    +--------+                 +--------------+

v2: Drop unused function definitions

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;Wenjing.Liu@amd.com&gt;
Reviewed-by: Wenjing Liu &lt;Wenjing.Liu@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This module manages HDCP for amdgpu driver. The module behaves as a
state machine which handles the different authentication states of HDCP

The module is divided into 3 major components
+--------+
| Hdcp.c |
+--------+
Manages the state machine, sends the events to be executed and communicates
with the dm

+-----------+
|Execution.c|
+-----------+
This executes events based on the current state. Also generates
execution results as transition inputs

+------------+
|Transition.c|
+------------+
Decides the next state based on the input and makes requests to
hdcp.c to handle.
                                +-------------+
                        ------&gt; | Execution.c | ------
                        |       +-------------+       |
                        |                             V
+----+              +--------+                 +--------------+
| DM |    -----&gt;    | Hdcp.c |  &lt;------------  | Transition.c |
+----+    &lt;-----    +--------+                 +--------------+

v2: Drop unused function definitions

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;Wenjing.Liu@amd.com&gt;
Reviewed-by: Wenjing Liu &lt;Wenjing.Liu@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: build dcn21 blocks</title>
<updated>2019-08-29T20:52:33+00:00</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2019-07-26T21:20:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=25f9955b15298c7b3c4fe0f28f469ddb5125e93b'/>
<id>25f9955b15298c7b3c4fe0f28f469ddb5125e93b</id>
<content type='text'>
Enable the building of dcn21 support.

Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable the building of dcn21 support.

Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: move vmid determination logic to a module</title>
<updated>2019-06-22T14:34:14+00:00</updated>
<author>
<name>Dmytro Laktyushkin</name>
<email>Dmytro.Laktyushkin@amd.com</email>
</author>
<published>2019-05-22T22:05:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=bda9afdacf8942c313a47cc95582737345a91c5e'/>
<id>bda9afdacf8942c313a47cc95582737345a91c5e</id>
<content type='text'>
Currently vmid is decided internally inside dc. With the introduction
of new asics we are required to coordinate vmid use with external
components.

This change converts vmid logic to a DAL module allowing vmid to be
passed in as a parameter to DC.

Signed-off-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently vmid is decided internally inside dc. With the introduction
of new asics we are required to coordinate vmid use with external
components.

This change converts vmid logic to a DAL module allowing vmid to be
passed in as a parameter to DC.

Signed-off-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
