linux.git/drivers/gpu/drm/amd/display/amdgpu_dm, branch v6.7-rc2

drm/amd/display: Change the DMCUB mailbox memory location from FB to inbox

2023-11-17T05:54:58+00:00

[WHY]
Flush command sent to DMCUB spends more time for execution on
a dGPU than on an APU. This causes cursor lag when using high
refresh rate mouses.

[HOW]
1. Change the DMCUB mailbox memory location from FB to inbox.
2. Only change windows memory to inbox.

Cc: Mario Limonciello 
Cc: Alex Deucher 
Cc: stable@vger.kernel.org
Reviewed-by: Nicholas Kazlauskas 
Acked-by: Alex Hung 
Signed-off-by: Lewis Huang 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Enable fast plane updates on DCN3.2 and above

2023-11-17T05:50:57+00:00

[WHY]
When cursor moves across screen boarder, lag cursor observed,
since subvp settings need to sync up with vblank that causes
cursor updates being delayed.

[HOW]
Enable fast plane updates on DCN3.2 to fix it.

Cc: Mario Limonciello 
Cc: Alex Deucher 
Cc: stable@vger.kernel.org
Reviewed-by: Aurabindo Pillai 
Acked-by: Alex Hung 
Signed-off-by: Tianci Yin 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: fix NULL dereference

2023-11-17T05:50:33+00:00

The following patch will fix a minor issue where a debug message is
referencing an struct that has just being checked whether is null or
not. This has been noticed by using coccinelle, in the following output:

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c:540:25-29: ERROR: aconnector is NULL but dereferenced.

Fixes: 5d72e247e58c ("drm/amd/display: switch DC over to the new DRM logging macros")
Signed-off-by: José Pekkarinen 
Signed-off-by: Hamza Mahfooz 
Signed-off-by: Alex Deucher

drm/amd/display: fix a NULL pointer dereference in amdgpu_dm_i2c_xfer()

2023-11-17T05:50:15+00:00

When ddc_service_construct() is called, it explicitly checks both the
link type and whether there is something on the link which will
dictate whether the pin is marked as hw_supported.

If the pin isn't set or the link is not set (such as from
unloading/reloading amdgpu in an IGT test) then fail the
amdgpu_dm_i2c_xfer() call.

Cc: stable@vger.kernel.org
Fixes: 22676bc500c2 ("drm/amd/display: Fix dmub soft hang for PSR 1")
Link: https://github.com/fwupd/fwupd/issues/6327
Signed-off-by: Mario Limonciello 
Reviewed-by: Harry Wentland 
Signed-off-by: Alex Deucher

drm/amd/display: Fix DSC not Enabled on Direct MST Sink

2023-11-17T05:48:02+00:00

[WHY & HOW]
For the scenario when a dsc capable MST sink device is directly
connected, it needs to use max dsc compression as the link bw constraint.

Cc: Mario Limonciello 
Cc: Alex Deucher 
Cc: stable@vger.kernel.org
Reviewed-by: Roman Li 
Acked-by: Alex Hung 
Signed-off-by: Fangzhi Zuo 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Set stream's DP test pattern upon test request

2023-11-07T17:03:30+00:00

[Why]
A recent refactor of DC's DP test pattern automation code requires the
DC stream's test pattern and test pattern color space fields to be
correctly populated before calling dc_link_dp_set_test_pattern.

[How]
Populate stream's test pattern type and color space fields before
calling into DC to program DP test pattern.

Reviewed-by: Aurabindo Pillai 
Acked-by: Hersen Wu 
Signed-off-by: George Shen 
Signed-off-by: Hersen Wu 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Create optc.h file

2023-11-07T17:03:30+00:00

For all the components that participate in DCN architecture, there is a
header in the dc/inch/hw. For some reason, OPTC broke this pattern and
added all the primary functions/structs associated with that in the
dcn10_optc.h file. For consistency's sake, this commit introduces a new
optc.h file and extracts the code from dcn10_optc to this new file.

Reviewed-by: Hamza Mahfooz 
Acked-by: Hersen Wu 
Signed-off-by: Rodrigo Siqueira 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: fix S/G display enablement

2023-10-27T18:10:37+00:00

An assignment statement was reversed during a refactor which effectively
disabled S/G display outright. Since, we use
adev->mode_info.gpu_vm_support to indicate to the rest of the driver
that S/G display should be enabled and currently it is always set to
false. So, to fix this set adev->mode_info.gpu_vm_support's value to
that of init_data.flags.gpu_vm_support (and not vice versa).

Fixes: 098c13079c6f ("drm/amd/display: enable S/G display for for recent APUs by default")
Reported-by: Mark Broadworth 
Tested-by: Mark Broadworth 
Acked-by: Alex Deucher 
Reviewed-by: Harry Wentland 
Reviewed-by: Yifan Zhang 
Signed-off-by: Hamza Mahfooz 
Signed-off-by: Alex Deucher

drm/amd/display: add interface to query SubVP status

2023-10-26T23:02:31+00:00

[Why&How]
To enable automated testing through IGT, expose an API that is
accessible through debugfs to query current status of SubVP feature.

Reviewed-by: Alvin Lee 
Acked-by: Roman Li 
Signed-off-by: Aurabindo Pillai 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Add prefix for plane functions

2023-10-26T23:00:09+00:00

This commit adds the amdgpu_dm_plane_ prefix for all functions in the
amdgpu_dm_plane.c. This change enables an easy way to filter code paths
via ftrace.

Reviewed-by: Aurabindo Pillai 
Acked-by: Roman Li 
Signed-off-by: Rodrigo Siqueira 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher