linux.git/drivers/gpu/drm/amd/amdgpu, branch v7.2-rc6

drm/amdgpu: cap GTT size to physical RAM on APUs

2026-07-29T00:01:16+00:00

On APUs, the GTT pool is backed by system RAM, but its size is not bound
to the non-carveout memory that actually backs it. A user can end up
with GTT + VRAM exceeding total physical memory through the following
sequence:

 - Have a large non-carveout memory space (~128GB) and accordingly set a
   large GTT (~100GB) via the ttm module parameter.
 - Lower the non-carveout memory space in BIOS by increasing the UMA
   Frame Buffer Size (VRAM) to 64GB.
 - The previously set GTT value (~100GB) persists, even though the new
   non-carveout space (64GB) can no longer back it.

This leads to a case where kernel reports GTT (100GB) + VRAM (64GB)
despite the sum being greater than total physical memory (128GB).

Cap the GTT size to totalram_pages() on APUs. totalram_pages() already
excludes the VRAM carveout, so the resulting GTT can never exceed the
system RAM that actually backs it.

Signed-off-by: Harkirat Gill 
Reviewed-by: David Francis 
Assisted-by: Claude:claude-opus-4
Signed-off-by: Alex Deucher 
(cherry picked from commit 5dafdd649280c7dc6c22c8f877da3f54fcc441e1)
Cc: stable@vger.kernel.org

drm/amd/pm: use milliwatts for GPU power sensors

2026-07-29T00:01:06+00:00

GPU average and input power backends report a mix of whole watts,
milliwatts, Q24.8 watts and decimal-packed fractions. Q24.8 is inherited
from the legacy PowerPlay sensor format. Milliwatts are a more natural unit
for the hwmon and pm_info consumers in amdgpu_pm.c. A common decoder cannot
distinguish these formats, and converting native milliwatts through Q24.8
also loses precision.

Use milliwatts as the internal unit across all PPT and PowerPlay backends.
Decode Q24.8 only at the legacy smu7 input boundary and encode it only for
the raw amdgpu_sensors debugfs interface. This gives hwmon, pm_info and the
sensor ioctl one unambiguous unit while preserving the format used by UMR.

Fixes: 5b79d0482f3c ("drm/amd/pp: Remove struct pp_gpu_power")
Fixes: 01992b121fb6 ("drm/amd/pm: fix amdgpu_pm_info power display units")
Signed-off-by: Yang Wang 
Reviewed-by: Kenneth Feng 
Reported-by: Lars Nieradzik 
Signed-off-by: Alex Deucher 
(cherry picked from commit 757ba0790bafec47a507e9662bf380f2e027d420)
Cc: stable@vger.kernel.org

drm/amdgpu: restore UMD profile pstate after runtime resume

2026-07-29T00:00:49+00:00

Runtime suspend runs GFX hw_fini and clears perfmon clock gating while
the UMD profile DPM level remains set in software.  Re-apply stable
pstate after a successful runtime resume when a profile mode is active.

Signed-off-by: Candice Li 
Reviewed-by: Hawking Zhang 
Reviewed-by: Yang Wang 
Signed-off-by: Alex Deucher 
(cherry picked from commit 138531c8850cc247aa12b104bb29ea387bcdcbb1)
Cc: stable@vger.kernel.org

drm/amdgpu: enable mode2 reset for SMU IP v15.0.5

2026-07-28T23:59:59+00:00

Set the default reset method to mode2 for SMU 15.0.5.

Signed-off-by: Kanala Ramalingeswara Reddy 
Reviewed-by: Pratik Vishwakarma 
Signed-off-by: Alex Deucher 
(cherry picked from commit 314d49abe315cd0d0a872a43f68f08be43a305c8)

drm/amdgpu: Fix NBIO 7.11.5 offsets

2026-07-28T23:59:44+00:00

Fix NBIO 7.11.5 related offsets

Signed-off-by: Shubhankar Milind Sardeshpande 
Reviewed-by: Mario Limonciello (AMD) 
Signed-off-by: Alex Deucher 
(cherry picked from commit dcc27ae3092211c913a1bea04618c4faf1234d48)

drm/amdgpu: Enable support for PSP 15_0_5

2026-07-28T23:59:44+00:00

Add PSP 15.0.5 related offsets for GFX to KMD interface
and enable support for it.

Co-developed-by: Pratik Vishwakarma 
Signed-off-by: Pratik Vishwakarma 
Signed-off-by: Shubhankar Milind Sardeshpande 
Reviewed-by: Mario Limonciello (AMD) 
Signed-off-by: Alex Deucher 
(cherry picked from commit b01e244c82c5d033d7424a64abe4079f3fceb869)

drm/amdgpu: move debug_vm handling to amdgpu_cs_parser_fini

2026-07-28T23:59:29+00:00

The commit referenced below restarts the CS if the validation is
still in progress. When debug_vm is enabled, all BOs from the CS
are invalidated so we will hit an infinite loop.

To avoid that, defer BO invalidation to amdgpu_cs_parser_fini.

Fixes: 59720bfd8c6d ("drm/amdgpu: restart the CS if some parts of the VM are still invalidated")
Signed-off-by: Pierre-Eric Pelloux-Prayer 
Reviewed-by: Christian König 
Signed-off-by: Alex Deucher 
(cherry picked from commit 8c990ee9daa295462df24982ce6878db997a380a)
Cc: stable@vger.kernel.org

drm/amdgpu: Update message IDs to PMFW to correctly gather GFXOFF residency logs

2026-07-28T23:59:22+00:00

Updates PPSMC_MSGs and set/get functions for gathering GFXOFF logs
on Van Gogh. Logs are now gathered live rather than starting then
stopping logging and reading an average value afterwards. This is
in accordance to changes made in PMFW.

In regards to messageID 0x52, the old interface uses a start/stop
parameter, and the new one doesn't. The firmware is checked to
determine which method to use.

v2: added firmware guard to new interface, old interface kept as
fallback

Signed-off-by: Fares Soliman 
Acked-by: Alex Deucher 
Signed-off-by: Alex Deucher 
(cherry picked from commit 482e2cadea8c34ae4e733f269a640d6b04fc9262)

drm/amdgpu: Pack nested ucode_info struct

2026-07-28T23:59:22+00:00

Building for ARCH=um with W=1 C=1 makes the "amd_sriov_msg_vf2pf_info
must be 1 KB" static assertion in amdgv_sriovmsg.h fail under sparse,
exposed after UML builds were enabled.

Sparse does not honor #pragma pack(push, 1) for the nested ucode_info
struct, so it sizes each element as 8 bytes instead of 5 and computes
the surrounding structure as larger than 1 KB. The compilers get this
right via the enclosing pragma, but the annotation should be explicit.

Fixes: af3f2f5db265 ("drm/amdgpu: Remove UML build exclusion from Kconfig")
Reported-by: kernel test robot 
Closes: https://lore.kernel.org/oe-kbuild-all/202607091659.SHEscT0c-lkp@intel.com/
Cc: Harry Wentland 
Assisted-by: Copilot:Claude-Opus-4.8
Signed-off-by: Alex Hung 
Reviewed-by: Harry Wentland 
Signed-off-by: Alex Deucher 
(cherry picked from commit 1d8cfeb69daa863a70134b8ed6df8055c418a5b0)

drm/amdgpu: Fix __rcu fence pointer accesses

2026-07-28T23:59:22+00:00

Building for ARCH=um with W=1 C=1 makes sparse report "incompatible
types in comparison expression (different address spaces)" warnings in
the KFD code, exposed after UML builds were enabled:

- amdgpu_amdkfd_fence.c compares the __rcu-annotated dma_fence.ops
  pointer directly in to_amdgpu_amdkfd_fence().
- amdgpu_amdkfd_gpuvm.c compares the __rcu eviction fence pointer
  directly in amdgpu_amdkfd_gpuvm_restore_process_bos().

Fixes: af3f2f5db265 ("drm/amdgpu: Remove UML build exclusion from Kconfig")
Reported-by: kernel test robot 
Closes: https://lore.kernel.org/oe-kbuild-all/202607091659.SHEscT0c-lkp@intel.com/
Cc: Harry Wentland 
Assisted-by: Copilot:Claude-Opus-4.8
Signed-off-by: Alex Hung 
Reviewed-by: Christian König 
Signed-off-by: Alex Deucher 
(cherry picked from commit 764f241ad227bb942e5b0b8b4d9898f1a4175605)