linux.git/drivers/gpu/drm/amd/amdgpu/vi.c, branch v4.17 Linux kernel source tree drm/amdgpu: Delete dead code when early init 2018-03-19T18:34:46+00:00 Rex Zhu Rex.Zhu@amd.com 2018-03-16T04:40:16+00:00 699f47951e79b6e0ad33f7d7406c6a574293e339 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Remove wrapper layer of smu ip functions 2018-03-15T14:57:50+00:00 Rex Zhu Rex.Zhu@amd.com 2018-03-12T11:52:23+00:00 b905090d2bae2e6189511714a7b88691b439c5a1 1. delete amdgpu_powerplay.c used for wrapping smu ip functions 2. delete struct pp_instance, 3. make struct hwmgr as the smu hw handle. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
1. delete amdgpu_powerplay.c used for wrapping smu ip functions
2. delete struct pp_instance,
3. make struct hwmgr as the smu hw handle.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move getting pcie info to common code 2018-03-14T21:01:16+00:00 Alex Deucher alexander.deucher@amd.com 2018-03-09T20:14:11+00:00 5494d8640ffc1df6096fd37943948ab46a152850 No need to replicate it in several places. Reviewed-by: Rex Zhu <rezhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
No need to replicate it in several places.

Reviewed-by: Rex Zhu <rezhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move firmware loading type setup to common code 2018-03-14T21:01:15+00:00 Alex Deucher alexander.deucher@amd.com 2018-03-09T20:06:35+00:00 19aede779138c0514b8e96c24473f22aaf21be65 No need to replicate it in several places. Reviewed-by: Rex Zhu <rezhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
No need to replicate it in several places.

Reviewed-by: Rex Zhu <rezhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add optional ring to *_hdp callbacks 2018-02-19T19:18:20+00:00 Christian König christian.koenig@amd.com 2018-01-19T13:17:40+00:00 698825653fdf1a696e1b9458ed9fc4aa2c6587d4 This adds an optional ring to the invalidate_hdp and flush_hdp callbacks. If the ring isn't specified or the emit_wreg function not available the HDP operation will be done with the CPU otherwise by writing on the ring. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
This adds an optional ring to the invalidate_hdp and flush_hdp
callbacks. If the ring isn't specified or the emit_wreg function not
available the HDP operation will be done with the CPU otherwise by
writing on the ring.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add HDP asic callbacks for VI 2018-02-19T19:17:13+00:00 Alex Deucher alexander.deucher@amd.com 2017-09-06T22:06:24+00:00 dd8d07f2fb2a5acb972e62a5cd00f6d56e7d2b8c Needed to flush and invalidate the HDP block using the CPU. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Samuel Li <Samuel.Li@amd.com> 
Needed to flush and invalidate the HDP block using the CPU.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
drm/amdgpu: re-enable CGCG on CZ and disable on ST 2018-02-06T05:05:22+00:00 Shirish S shirish.s@amd.com 2018-02-05T03:53:00+00:00 fb4bbba2775399149ca902f31eb5c46cc7a8d8b8 The CGCG feature on Stoney is causing GFX related issues such as freezes and blank outs. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Arindam Nath <arindam.nath@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
The CGCG feature on Stoney is causing GFX related
issues such as freezes and blank outs.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Arindam Nath <arindam.nath@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: disable coarse grain clockgating for ST 2018-01-30T04:30:44+00:00 Shirish S shirish.s@amd.com 2018-01-19T08:47:22+00:00 7e24a3ea825e546487c3fc47f8cbf6512f6c9e8c The CGCG feature on Stoney is causing GFX related issues such as freezes and blank outs. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Arindam Nath <arindam.nath@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
The CGCG feature  on Stoney is causing GFX related
issues such as freezes and blank outs.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Arindam Nath <arindam.nath@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: use defines for mmBIF_IOV_FUNC_IDENTIFIER fields 2017-12-20T04:44:13+00:00 Alex Deucher alexander.deucher@amd.com 2017-12-19T14:57:53+00:00 04a0d2d9a6ee9dad813efadc653a7708220f9de8 Rather than magic numbers. Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Rather than magic numbers.

Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: only check mmBIF_IOV_FUNC_IDENTIFIER on tonga/fiji 2017-12-20T04:40:51+00:00 Alex Deucher alexander.deucher@amd.com 2017-12-19T14:52:31+00:00 57ad33a307bf85cafda3a77c03a555c9f9ee4139 We only support SR-IOV on tonga/fiji. Don't check this register on other VI parts. Fixes: 048765ad5af7c89 (amdgpu: fix asic initialization for virtualized environments (v2)) Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org 
We only support SR-IOV on tonga/fiji.  Don't check this register
on other VI parts.

Fixes: 048765ad5af7c89 (amdgpu: fix asic initialization for virtualized environments (v2))
Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org