linux.git/drivers/gpu/drm/amd/amdgpu/nv.c, branch v7.1-rc2 Linux kernel source tree drm/amdgpu: Add pcie64 indirect to register block 2026-03-02T21:46:34+00:00 Lijo Lazar lijo.lazar@amd.com 2025-12-09T05:41:41+00:00 74b9c49e6d8ba2586081aecd86af96c510092103 Move 64-bit pcie indirect read/writes to register access block. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Move 64-bit pcie indirect read/writes to register access block.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add pcie indirect to register block 2026-03-02T21:46:28+00:00 Lijo Lazar lijo.lazar@amd.com 2025-12-09T04:17:13+00:00 e84d7e717bf94bd977e20e5ca52d0b2ae4e19802 Move pcie indirect access to register access block. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Move pcie indirect access to register access block.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add pciep method to register block 2026-03-02T21:46:19+00:00 Lijo Lazar lijo.lazar@amd.com 2025-12-09T04:05:18+00:00 5d82f451b0ab2d7137d9ffdd0d15675b756ab29d Move pcie port method to register access block. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Move pcie port method to register access block.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add didt method to register block 2026-03-02T21:46:03+00:00 Lijo Lazar lijo.lazar@amd.com 2025-12-08T13:22:42+00:00 4780a26a96f88631d56f7bd0eee4e2c6721a279b Move didt callbacks to register access block. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Move didt callbacks to register access block.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add uvd indirect to register block 2026-03-02T21:43:10+00:00 Lijo Lazar lijo.lazar@amd.com 2025-12-08T13:08:52+00:00 366201e790f10ddc081ef787e2e345553b87459d Add uvd indirect method to register access block and replace the existing calls from adev. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add uvd indirect method to register access block and replace the
existing calls from adev.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add smc method to register block 2026-03-02T21:42:38+00:00 Lijo Lazar lijo.lazar@amd.com 2025-12-08T12:56:09+00:00 f4eb08f8b216c334752246fe24e1304477d78968 Define register access block which consolidates different register access methods. Add smc method to register access block. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Define register access block which consolidates different register access
methods. Add smc method to register access block.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Make pre_asic_init optional 2025-12-08T18:56:42+00:00 Lijo Lazar lijo.lazar@amd.com 2025-11-28T07:06:46+00:00 018fd6d7d92d704709e8dfe497fe3aac1566e90f pre_asic_init is not required for all SOCs. Make it optional and remove empty implementations. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
pre_asic_init is not required for all SOCs. Make it optional and remove
empty implementations.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Update SRIOV video codec caps 2025-03-14T03:08:51+00:00 David Rosca david.rosca@amd.com 2025-02-28T12:44:32+00:00 19478f2011f8b53dee401c91423c4e0b73753e4f There have been multiple fixes to the video caps that are missing for SRIOV. Update the SRIOV caps with correct values. Signed-off-by: David Rosca <david.rosca@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
There have been multiple fixes to the video caps that are missing for
SRIOV. Update the SRIOV caps with correct values.

Signed-off-by: David Rosca <david.rosca@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Fix JPEG video caps max size for navi1x and raven 2025-03-14T03:08:14+00:00 David Rosca david.rosca@amd.com 2025-02-28T12:34:49+00:00 6e0d2fde3ae8fdb5b47e10389f23ed2cb4daec5d 8192x8192 is the maximum supported resolution. Signed-off-by: David Rosca <david.rosca@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
8192x8192 is the maximum supported resolution.

Signed-off-by: David Rosca <david.rosca@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Fix MPEG2, MPEG4 and VC1 video caps max size 2025-03-14T03:07:52+00:00 David Rosca david.rosca@amd.com 2025-02-28T12:32:46+00:00 1a0807feb97082bff2b1342dbbe55a2a9a8bdb88 1920x1088 is the maximum supported resolution. Signed-off-by: David Rosca <david.rosca@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
1920x1088 is the maximum supported resolution.

Signed-off-by: David Rosca <david.rosca@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>