<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h, branch v5.17</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>drm/amdgpu: fix incorrect VCN revision in SRIOV</title>
<updated>2021-12-13T21:33:15+00:00</updated>
<author>
<name>Leslie Shi</name>
<email>Yuliang.Shi@amd.com</email>
</author>
<published>2021-12-08T07:47:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c40bdfb2ffa4cf16b818fd6c77856e6d976f52ff'/>
<id>c40bdfb2ffa4cf16b818fd6c77856e6d976f52ff</id>
<content type='text'>
Guest OS will setup VCN instance 1 which is disabled as an enabled instance and
execute initialization work on it, but this causes VCN ib ring test failure
on the disabled VCN instance during modprobe:

amdgpu 0000:00:08.0: amdgpu: ring vcn_enc_1.0 uses VM inv eng 5 on hub 1
amdgpu 0000:00:08.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on vcn_dec_0 (-110).
amdgpu 0000:00:08.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on vcn_enc_0.0 (-110).
[drm:amdgpu_device_delayed_init_work_handler [amdgpu]] *ERROR* ib ring test failed (-110).

v2: drop amdgpu_discovery_get_vcn_version and rename sriov_config to
vcn_config
v3: modify VCN's revision in SR-IOV and bare-metal

Fixes: baf3f8f3740625 ("drm/amdgpu: handle SRIOV VCN revision parsing")
Signed-off-by: Leslie Shi &lt;Yuliang.Shi@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Guest OS will setup VCN instance 1 which is disabled as an enabled instance and
execute initialization work on it, but this causes VCN ib ring test failure
on the disabled VCN instance during modprobe:

amdgpu 0000:00:08.0: amdgpu: ring vcn_enc_1.0 uses VM inv eng 5 on hub 1
amdgpu 0000:00:08.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on vcn_dec_0 (-110).
amdgpu 0000:00:08.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on vcn_enc_0.0 (-110).
[drm:amdgpu_device_delayed_init_work_handler [amdgpu]] *ERROR* ib ring test failed (-110).

v2: drop amdgpu_discovery_get_vcn_version and rename sriov_config to
vcn_config
v3: modify VCN's revision in SR-IOV and bare-metal

Fixes: baf3f8f3740625 ("drm/amdgpu: handle SRIOV VCN revision parsing")
Signed-off-by: Leslie Shi &lt;Yuliang.Shi@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: handle SRIOV VCN revision parsing</title>
<updated>2021-12-02T17:43:25+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-11-30T22:04:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=baf3f8f374062573c469631af03bf7fb1725896b'/>
<id>baf3f8f374062573c469631af03bf7fb1725896b</id>
<content type='text'>
For SR-IOV, the IP discovery revision number encodes
additional information.  Handle that case here.

v2: drop additional IP versions

Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For SR-IOV, the IP discovery revision number encodes
additional information.  Handle that case here.

v2: drop additional IP versions

Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: Consolidate VCN firmware setup code</title>
<updated>2021-10-22T03:38:46+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-10-19T17:20:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c5dd5667f4196b5b3b4bc2a83ad795850c08197f'/>
<id>c5dd5667f4196b5b3b4bc2a83ad795850c08197f</id>
<content type='text'>
Roughly the same code was present in all VCN versions.
Consolidate it into a single function.

v2: use AMDGPU_UCODE_ID_VCN + i, check if num_inst &gt;= 2

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: James Zhu &lt;James.Zhu@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Roughly the same code was present in all VCN versions.
Consolidate it into a single function.

v2: use AMDGPU_UCODE_ID_VCN + i, check if num_inst &gt;= 2

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: James Zhu &lt;James.Zhu@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/vcn: set the priority for each encode ring</title>
<updated>2021-09-01T20:55:11+00:00</updated>
<author>
<name>Satyajit Sahu</name>
<email>satyajit.sahu@amd.com</email>
</author>
<published>2021-08-27T06:28:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0ad29a4eb13577ff5c7e5d545d4a49c79052ffb0'/>
<id>0ad29a4eb13577ff5c7e5d545d4a49c79052ffb0</id>
<content type='text'>
VCN has multiple rings. Set the proper priority level for each
encode ring while initializing.

Signed-off-by: Satyajit Sahu &lt;satyajit.sahu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
VCN has multiple rings. Set the proper priority level for each
encode ring while initializing.

Signed-off-by: Satyajit Sahu &lt;satyajit.sahu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: Use IP discovery data to determine VCN enablement instead of MMSCH</title>
<updated>2021-06-18T21:14:01+00:00</updated>
<author>
<name>Bokun Zhang</name>
<email>Bokun.Zhang@amd.com</email>
</author>
<published>2021-01-05T21:15:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=376002f4b028504a07868f7ee96ad41e0f69ae09'/>
<id>376002f4b028504a07868f7ee96ad41e0f69ae09</id>
<content type='text'>
In the past, we use MMSCH to determine whether a VCN is enabled or not.
This is not reliable since after a FLR, MMSCH may report junk data.

It is better to use IP discovery data.

Signed-off-by: Bokun Zhang &lt;Bokun.Zhang@amd.com&gt;
Signed-off-by: Peng Ju Zhou &lt;PengJu.Zhou@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In the past, we use MMSCH to determine whether a VCN is enabled or not.
This is not reliable since after a FLR, MMSCH may report junk data.

It is better to use IP discovery data.

Signed-off-by: Bokun Zhang &lt;Bokun.Zhang@amd.com&gt;
Signed-off-by: Peng Ju Zhou &lt;PengJu.Zhou@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: share scheduler score on VCN3 instances</title>
<updated>2021-04-09T20:45:03+00:00</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2021-02-02T12:13:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c62dfdbbf7109592d6aa6fc59fb954dba12743d7'/>
<id>c62dfdbbf7109592d6aa6fc59fb954dba12743d7</id>
<content type='text'>
The VCN3 instances can do both decode as well as encode.

Share the scheduler load balancing score and remove fixing encode to
only the second instance.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-and-Tested-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The VCN3 instances can do both decode as well as encode.

Share the scheduler load balancing score and remove fixing encode to
only the second instance.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-and-Tested-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/vcn3.0: add wptr/rptr reset/update for share memory</title>
<updated>2021-02-24T14:28:55+00:00</updated>
<author>
<name>Sonny Jiang</name>
<email>sonny.jiang@amd.com</email>
</author>
<published>2021-01-31T14:44:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b2576c3bf4ce9b992e1c1fbb1cffe0d606702621'/>
<id>b2576c3bf4ce9b992e1c1fbb1cffe0d606702621</id>
<content type='text'>
Because of dpg, the rptr/wptr need to be saved on fw shared memory,
and restore them back in RBC_RB_RPTR/WPTR in kernel at power up.

Signed-off-by: Sonny Jiang &lt;sonny.jiang@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Because of dpg, the rptr/wptr need to be saved on fw shared memory,
and restore them back in RBC_RB_RPTR/WPTR in kernel at power up.

Signed-off-by: Sonny Jiang &lt;sonny.jiang@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/vcn: update header to support dec software ring</title>
<updated>2020-11-24T17:04:04+00:00</updated>
<author>
<name>James Zhu</name>
<email>James.Zhu@amd.com</email>
</author>
<published>2020-11-02T20:21:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=477f25ebe2fe9a1943ff69ec659c090a7e29e024'/>
<id>477f25ebe2fe9a1943ff69ec659c090a7e29e024</id>
<content type='text'>
Add macro, structure and function prototype to
support vcn dec software ring.

Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add macro, structure and function prototype to
support vcn dec software ring.

Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: vcn and jpeg ring synchronization</title>
<updated>2020-10-14T19:27:50+00:00</updated>
<author>
<name>Veerabadhran G</name>
<email>vegopala@amd.com</email>
</author>
<published>2020-10-08T17:00:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=187561dd76531945126b15c9486fec7cfa5f0415'/>
<id>187561dd76531945126b15c9486fec7cfa5f0415</id>
<content type='text'>
Synchronize the ring usage for vcn1 and jpeg1 to workaround a hardware bug.

Signed-off-by: Veerabadhran Gopalakrishnan &lt;veerabadhran.gopalakrishnan@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Synchronize the ring usage for vcn1 and jpeg1 to workaround a hardware bug.

Signed-off-by: Veerabadhran Gopalakrishnan &lt;veerabadhran.gopalakrishnan@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/vcn: merge shared memory into vcpu</title>
<updated>2020-07-21T19:37:40+00:00</updated>
<author>
<name>James Zhu</name>
<email>James.Zhu@amd.com</email>
</author>
<published>2020-07-16T13:56:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4908d02637b34e604efbe77aadecb510338d92c9'/>
<id>4908d02637b34e604efbe77aadecb510338d92c9</id>
<content type='text'>
Merge vcn firmware shared memory bo into vcn vcpu bo.

Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Merge vcn firmware shared memory bo into vcn vcpu bo.

Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
