linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c, branch v7.3-rc2 Linux kernel source tree drm/amdgpu: normalize error return of RAS command wrapper functions 2026-07-28T23:17:32+00:00 Ce Sun cesun102@amd.com 2026-07-23T06:41:37+00:00 b84d8db29e0cbd289f0bfe6a3f18ab487ddc9b5e User-space read/write syscalls interpret positive driver return values as successful transfer sizes. Our current RAS wrappers return positive error codes, so we must convert them to standard negative error codes. Signed-off-by: Ce Sun <cesun102@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
User-space read/write syscalls interpret positive driver return values
as successful transfer sizes. Our current RAS wrappers return positive
error codes, so we must convert them to standard negative error codes.

Signed-off-by: Ce Sun <cesun102@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move struct amdgpu_wb and helpers into separate files 2026-07-08T18:20:30+00:00 Shahyan Soltani shahyan.soltani@amd.com 2026-06-03T13:23:04+00:00 fbf41e05119f43e9d69307272ced4ed3b82ad371 Move struct amdgpu_wb and helpers out of the monolithic header amdgpu.h into its own dedicated header amdgpu_wb.h. Add amdgpu_wb_init() and amdgpu_wb_fini() into amdgpu_wb.h. Move functions amdgpu_device_wb_get(), amdgpu_device_wb_free(), amdgpu_device_wb_init(), and amdgpu_device_wb_fini() out of amdgpu_device.c into new dedicated amdgpu_wb.c file. Removed static from functions amdgpu_device_wb_init() and amdgpu_device_wb_fini(). Rename functions amdgpu_device_wb_get(), amdgpu_device_wb_free(), amdgpu_device_wb_init(), and amdgpu_device_wb_fini() into amdgpu_wb_get(), amdgpu_wb_free(), amdgpu_wb_init(), and amdgpu_wb_fini(). Update amdgpu/Makefile to build amdgpu_wb.o. This is part of the ongoing effort to reduce the size of amdgpu.h into their own respective separate headers. Signed-off-by: Shahyan Soltani <shahyan.soltani@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Move struct amdgpu_wb and helpers out of the monolithic header amdgpu.h
into its own dedicated header amdgpu_wb.h.

Add amdgpu_wb_init() and amdgpu_wb_fini() into amdgpu_wb.h.

Move functions amdgpu_device_wb_get(), amdgpu_device_wb_free(),
amdgpu_device_wb_init(), and amdgpu_device_wb_fini() out of
amdgpu_device.c into new dedicated amdgpu_wb.c file.

Removed static from functions amdgpu_device_wb_init() and amdgpu_device_wb_fini().

Rename functions amdgpu_device_wb_get(), amdgpu_device_wb_free(),
amdgpu_device_wb_init(), and amdgpu_device_wb_fini() into
amdgpu_wb_get(), amdgpu_wb_free(), amdgpu_wb_init(), and amdgpu_wb_fini().

Update amdgpu/Makefile to build amdgpu_wb.o.

This is part of the ongoing effort to reduce the size of amdgpu.h into
their own respective separate headers.

Signed-off-by: Shahyan Soltani <shahyan.soltani@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Fix typos in comments for IP block soft reset 2026-07-01T15:39:41+00:00 Timur Kristóf timur.kristof@gmail.com 2026-06-24T07:38:29+00:00 2ea9fe3021d0bcfe9f3df15fae317c7376c3ab97 These typos were accidentally overlooked. Let's fix them now. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Link: https://patch.msgid.link/20260624073829.40835-2-timur.kristof@gmail.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
These typos were accidentally overlooked. Let's fix them now.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Link: https://patch.msgid.link/20260624073829.40835-2-timur.kristof@gmail.com
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Simplify filtering rings during IP block soft reset 2026-07-01T15:39:31+00:00 Timur Kristóf timur.kristof@gmail.com 2026-06-24T07:38:28+00:00 070e834f97756f2e592005b51d9a7d6104e3298d Instead of storing pointers to affected rings in an array, just iterate over all rings of the device and filter the affected rings by type using the type mask. This is done to save memory used by the array of affected rings which was sized AMDGPU_MAX_RINGS. Suggested-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Reviewed-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> # for the series Link: https://patch.msgid.link/20260624073829.40835-1-timur.kristof@gmail.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Instead of storing pointers to affected rings in an array,
just iterate over all rings of the device and filter the
affected rings by type using the type mask.

This is done to save memory used by the array of affected
rings which was sized AMDGPU_MAX_RINGS.

Suggested-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> # for the series
Link: https://patch.msgid.link/20260624073829.40835-1-timur.kristof@gmail.com
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add IP block soft reset as a GPU recovery method 2026-07-01T15:14:11+00:00 Timur Kristóf timur.kristof@gmail.com 2026-06-17T19:14:22+00:00 1fc76380c6ce5440e3cd02ddec76067f83969dc0 Implement IP block soft reset as a recovery method that fits into the current GPU recovery code as opposed to being hacked into the full GPU reset code path. This can gracefully handle GPU hangs when other reset methods are not available or have failed. It makes sure to minimize collateral damage (ie. affected non-guilty jobs) and does a backup and restore on all affected queues. Note that some of the new helpers may be useful for other reset types as well, which we can explore later. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Implement IP block soft reset as a recovery method that fits into
the current GPU recovery code as opposed to being hacked into the
full GPU reset code path.

This can gracefully handle GPU hangs when other reset methods
are not available or have failed. It makes sure to minimize
collateral damage (ie. affected non-guilty jobs) and does a
backup and restore on all affected queues.

Note that some of the new helpers may be useful for other
reset types as well, which we can explore later.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/ras: chunk UNIRAS CPER debugfs reads 2026-06-03T17:57:32+00:00 Xiang Liu xiang.liu@amd.com 2026-05-29T14:11:26+00:00 33425e49719f827289c0e11942cecdf31679f85d Legacy CPER ring readers can issue one debugfs read with a buffer larger than the UNIRAS RAS command payload limit. Passing that full size to GET_CPER_RECORD makes the command reject the request, so userspace may only see the ring prefix and treat the CPER stream as empty. Commit 3c88fb7aa57d ("drm/amd/ras: bound CPER record fetch buffer size") intentionally bounds CPER record fetch allocation by the command buffer size. Keep the debugfs ABI as a single contiguous ring read by splitting the internal GET_CPER_RECORD requests into RAS_CMD_MAX_CPER_BUF_SZ chunks. Accumulate the copied payload and update the legacy header write pointers from the total bytes returned to userspace. Signed-off-by: Xiang Liu <xiang.liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Legacy CPER ring readers can issue one debugfs read with a buffer larger
than the UNIRAS RAS command payload limit. Passing that full size to
GET_CPER_RECORD makes the command reject the request, so userspace may
only see the ring prefix and treat the CPER stream as empty.

Commit 3c88fb7aa57d ("drm/amd/ras: bound CPER record fetch buffer
size") intentionally bounds CPER record fetch allocation by the command
buffer size. Keep the debugfs ABI as a single contiguous ring read by
splitting the internal GET_CPER_RECORD requests into
RAS_CMD_MAX_CPER_BUF_SZ chunks.

Accumulate the copied payload and update the legacy header write pointers
from the total bytes returned to userspace.

Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/ras: make UNIRAS CPER debugfs header legacy-compatible 2026-06-03T17:50:39+00:00 Xiang Liu xiang.liu@amd.com 2026-05-29T14:10:09+00:00 7822e87bb77e906465c5d1e43818e1b34b59ee04 The UNIRAS CPER debugfs path returned a zeroed 12-byte prefix and used file offset directly as the CPER record index. Legacy CPER ring readers expect the prefix to contain three 32-bit ring pointers followed immediately by CPER payload data. Build the same header shape for UNIRAS reads by reporting a zero read pointer and matching write pointers for the returned payload size. Keep an internal record cursor behind the debugfs offset so follow-up reads continue from the correct CPER record while first reads still expose the legacy prefix. Signed-off-by: Xiang Liu <xiang.liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
The UNIRAS CPER debugfs path returned a zeroed 12-byte prefix and used
file offset directly as the CPER record index. Legacy CPER ring readers
expect the prefix to contain three 32-bit ring pointers followed
immediately by CPER payload data.

Build the same header shape for UNIRAS reads by reporting a zero read
pointer and matching write pointers for the returned payload size. Keep
an internal record cursor behind the debugfs offset so follow-up reads
continue from the correct CPER record while first reads still expose the
legacy prefix.

Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/ras: Fix CPER ring debugfs read overflow 2026-05-11T20:14:59+00:00 Xiang Liu xiang.liu@amd.com 2026-05-07T12:56:15+00:00 1e40ef87ffdc291e05ccdade8b9170cc9c1c4249 The legacy CPER debugfs reader can reach the payload path without a valid pointer snapshot. The remaining user byte count is also treated as the ring occupancy in dwords, so reads past the header can copy more than requested. Take the CPER lock before sampling pointers. Resample rptr/wptr for payload reads, bound the payload copy by available dwords and the remaining user size, and advance the file position for each dword copied. Signed-off-by: Xiang Liu <xiang.liu@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
The legacy CPER debugfs reader can reach the payload path without a
valid pointer snapshot. The remaining user byte count is also treated as
the ring occupancy in dwords, so reads past the header can copy more than
requested.

Take the CPER lock before sampling pointers. Resample rptr/wptr for
payload reads, bound the payload copy by available dwords and the
remaining user size, and advance the file position for each dword copied.

Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Merge tag 'amd-drm-next-7.1-2026-03-04' of https://gitlab.freedesktop.org/agd5f/linux into drm-next 2026-03-08T20:04:21+00:00 Dave Airlie airlied@redhat.com 2026-03-08T20:04:15+00:00 057ad0ef4da61a8ba654c691e3fc3933d92b7d5f amd-drm-next-7.1-2026-03-04: amdgpu: - FAMS2 updates - Refactor DC I2C - Rework ttm handling to allow for multiple engines - UserQ updates - Ring reset improvements - DC DCE 6.x cleanups - DC support for NUTMEG and TRAVIS DP bridges - Enable DC by default on CIK APUs - Add DCN 4.2 support - IPS fixes - Overlay fixes for DCN4 - SDMA Limit updates - Misc fixes - RAS updates - Register access callback rework - GC 12.1 updates amdkfd: - Misc cleanups UAPI: - UserQ fence IOCTL parameter size fixes. The change is backwards compatible on LE, but not BE. UserQs are still not considered stable and are disabled by default. From: Alex Deucher <alexander.deucher@amd.com> Link: https://patch.msgid.link/20260304213233.1938311-1-alexander.deucher@amd.com Signed-off-by: Dave Airlie <airlied@redhat.com> 
amd-drm-next-7.1-2026-03-04:

amdgpu:
- FAMS2 updates
- Refactor DC I2C
- Rework ttm handling to allow for multiple engines
- UserQ updates
- Ring reset improvements
- DC DCE 6.x cleanups
- DC support for NUTMEG and TRAVIS DP bridges
- Enable DC by default on CIK APUs
- Add DCN 4.2 support
- IPS fixes
- Overlay fixes for DCN4
- SDMA Limit updates
- Misc fixes
- RAS updates
- Register access callback rework
- GC 12.1 updates

amdkfd:
- Misc cleanups

UAPI:
- UserQ fence IOCTL parameter size fixes.  The change is backwards compatible on LE, but not BE.
  UserQs are still not considered stable and are disabled by default.

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patch.msgid.link/20260304213233.1938311-1-alexander.deucher@amd.com
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/amdgpu: rework ring reset backup and reemit v9 2026-02-23T19:33:11+00:00 Alex Deucher alexander.deucher@amd.com 2026-01-16T03:01:15+00:00 a17ef941212bf26e9985ec31486a9606420d8257 Store the start wptr and ib size in the IB fence. On queue reset, save the ring contents of all IBs. For reemit, reemit the entire IB state for non-guilty contexts. For guilty contexts, replace the IB submission with nops, but reemit the rest. Split the reemit per fence and when we reemit, update the wptr with the new values from reemit. This allows us to reemit jobs repeatedly as the wptrs get properly updated each time. v2: further simplify the logic v3: reemit vm state, not just vm fence v4: just nop the IB and possibly the VM portion of the submission v5: simplify the vm fence check v6: split the vm and ib fences v7: fix commit message v8: use wptr rather than count_dw to calculate offsets v9: fix missing documenation update spotted by the kernel test robot Reviewed-by: Jesse Zhang <jesse.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Store the start wptr and ib size in the IB fence. On queue
reset, save the ring contents of all IBs.

For reemit, reemit the entire IB state for non-guilty contexts.
For guilty contexts, replace the IB submission with nops, but reemit
the rest.  Split the reemit per fence and when we reemit, update the
wptr with the new values from reemit.  This allows us to reemit jobs
repeatedly as the wptrs get properly updated each time.

v2: further simplify the logic
v3: reemit vm state, not just vm fence
v4: just nop the IB and possibly the VM portion of the submission
v5: simplify the vm fence check
v6: split the vm and ib fences
v7: fix commit message
v8: use wptr rather than count_dw to calculate offsets
v9: fix missing documenation update spotted by the kernel test robot

Reviewed-by: Jesse Zhang <jesse.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>