<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h, branch v7.3-rc2</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>drm/amdgpu/mes: refactor the amdgpu_mes_alloc/free_proc|gang()</title>
<updated>2026-08-06T16:44:50+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-07-28T08:16:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d0827dda8fa7a1b398d7cf41e4c88c314691dcbc'/>
<id>d0827dda8fa7a1b398d7cf41e4c88c314691dcbc</id>
<content type='text'>
- Unify amdgpu_mes_alloc/free_proc|gang_ctx_index to provide
  centralized RS64mem bitmap management for both KGD and KFD.
- Retrieve the bitmap bit for userq contex index based on a
  per process granularity.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Unify amdgpu_mes_alloc/free_proc|gang_ctx_index to provide
  centralized RS64mem bitmap management for both KGD and KFD.
- Retrieve the bitmap bit for userq contex index based on a
  per process granularity.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: add mes gang contex alloc/free helper</title>
<updated>2026-07-15T13:15:43+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-07-09T02:42:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5ab89b491f215f69b750130ead2ff6bbde6c0e2e'/>
<id>5ab89b491f215f69b750130ead2ff6bbde6c0e2e</id>
<content type='text'>
Implement the MES gang contex alloc and free heplers.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Implement the MES gang contex alloc and free heplers.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: add mes process context alloc/free</title>
<updated>2026-07-15T13:15:41+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-07-03T02:25:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=cf5f98609a03d89a32cd0922b092eea66bdb2e77'/>
<id>cf5f98609a03d89a32cd0922b092eea66bdb2e77</id>
<content type='text'>
Those helpers allocates/frees slots from bitmaps for
process_context_array_index processed by MES firmware.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Those helpers allocates/frees slots from bitmaps for
process_context_array_index processed by MES firmware.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: add MES process/gang context size and bitmap helper</title>
<updated>2026-07-15T13:15:41+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-06-30T08:47:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=91d50ffb37dfa2f36893f5b306e72006e638dbe7'/>
<id>91d50ffb37dfa2f36893f5b306e72006e638dbe7</id>
<content type='text'>
Allocating the MES context bitmap to track the process/gang index usage.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Allocating the MES context bitmap to track the process/gang index usage.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: add RS64 local memory context array init/fini</title>
<updated>2026-07-15T13:15:40+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-06-29T06:47:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=56f7ea845e7d42db1fed48a0ec58fa09b95fabd7'/>
<id>56f7ea845e7d42db1fed48a0ec58fa09b95fabd7</id>
<content type='text'>
Add amdgpu_mes_rs64mem_init() and amdgpu_mes_rs64mem_fini() to
manage the RS64 local memory context arrays used by the MES
scheduler.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add amdgpu_mes_rs64mem_init() and amdgpu_mes_rs64mem_fini() to
manage the RS64 local memory context arrays used by the MES
scheduler.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: move struct amdgpu_mqd and helpers into header file</title>
<updated>2026-07-08T18:20:30+00:00</updated>
<author>
<name>Shahyan Soltani</name>
<email>shahyan.soltani@amd.com</email>
</author>
<published>2026-06-03T13:57:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6d9cea05db72476ea11a72a8e1e67161e5e48b01'/>
<id>6d9cea05db72476ea11a72a8e1e67161e5e48b01</id>
<content type='text'>
Move struct amdgpu_mqd_prop, struct amdgpu_mqd, and helpers from the monolithic amdgpu.h
into existing amdgpu_mes.h file.

This is part of the ongoing effort to reduce the size of amdgpu.h into their own respective
separate headers.

Signed-off-by: Shahyan Soltani &lt;shahyan.soltani@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move struct amdgpu_mqd_prop, struct amdgpu_mqd, and helpers from the monolithic amdgpu.h
into existing amdgpu_mes.h file.

This is part of the ongoing effort to reduce the size of amdgpu.h into their own respective
separate headers.

Signed-off-by: Shahyan Soltani &lt;shahyan.soltani@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: add the doorbell index input for suspending userq</title>
<updated>2026-07-01T15:48:07+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-06-17T06:20:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=bc434335ab3c096a33a9e88c7951b4ac574db458'/>
<id>bc434335ab3c096a33a9e88c7951b4ac574db458</id>
<content type='text'>
It requires inputing the doorbell offset for MES firmware preempts the
userq, and adding the doorbell offset also keep aliging with the
union MESAPI__SUSPEND in MES firmware.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It requires inputing the doorbell offset for MES firmware preempts the
userq, and adding the doorbell offset also keep aliging with the
union MESAPI__SUSPEND in MES firmware.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu,amdkfd: correct setting MES queue type</title>
<updated>2026-07-01T15:42:37+00:00</updated>
<author>
<name>Geoffrey McRae</name>
<email>geoffrey.mcrae@amd.com</email>
</author>
<published>2026-06-24T02:32:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=89db46e455abf1654f88d36e5429cb408abbc95e'/>
<id>89db46e455abf1654f88d36e5429cb408abbc95e</id>
<content type='text'>
MES ADD_QUEUE programs the firmware with the queue type from the driver
input, but MES REMOVE_QUEUE leaves queue_type at the zero-initialized
value.  Zero decodes as GFX in the MES REMOVE_QUEUE packet.

That means removing a KFD compute queue can be submitted to MES as a GFX
queue.  In a debug-trap suspend/remove sequence this can leave MES
looking for the doorbell in the wrong queue class and the REMOVE_QUEUE
command may never complete.  The observed failing packet removed
doorbell 0x1002 with queue_type=GFX even though the corresponding
ADD_QUEUE for the same doorbell was queue_type=COMPUTE.

Populate REMOVE_QUEUE.queue_type the same way ADD_QUEUE does.

Signed-off-by: Geoffrey McRae &lt;geoffrey.mcrae@amd.com&gt;
Reviewed-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
MES ADD_QUEUE programs the firmware with the queue type from the driver
input, but MES REMOVE_QUEUE leaves queue_type at the zero-initialized
value.  Zero decodes as GFX in the MES REMOVE_QUEUE packet.

That means removing a KFD compute queue can be submitted to MES as a GFX
queue.  In a debug-trap suspend/remove sequence this can leave MES
looking for the doorbell in the wrong queue class and the REMOVE_QUEUE
command may never complete.  The observed failing packet removed
doorbell 0x1002 with queue_type=GFX even though the corresponding
ADD_QUEUE for the same doorbell was queue_type=COMPUTE.

Populate REMOVE_QUEUE.queue_type the same way ADD_QUEUE does.

Signed-off-by: Geoffrey McRae &lt;geoffrey.mcrae@amd.com&gt;
Reviewed-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/amdgpu/include : update mes api header v11/v12</title>
<updated>2026-06-17T19:51:34+00:00</updated>
<author>
<name>Shaoyun Liu</name>
<email>shaoyun.liu@amd.com</email>
</author>
<published>2026-04-20T14:45:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a5b9f68d384a225f56d1b7453eb92b98d58cbe94'/>
<id>a5b9f68d384a225f56d1b7453eb92b98d58cbe94</id>
<content type='text'>
Update the parameter in SET_HW_RESOURCES API 1. Align with the setting
of enable_lr_compute_wa 2. Add enable_compute_pipe_reset to enable
pipe reset when compute queue reset failes

v2: add driver flags to track when we enable it

Signed-off-by: Shaoyun Liu &lt;shaoyun.liu@amd.com&gt;
Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update the parameter in SET_HW_RESOURCES API 1. Align with the setting
of enable_lr_compute_wa 2. Add enable_compute_pipe_reset to enable
pipe reset when compute queue reset failes

v2: add driver flags to track when we enable it

Signed-off-by: Shaoyun Liu &lt;shaoyun.liu@amd.com&gt;
Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: add a MMIO queue reset helper</title>
<updated>2026-06-17T19:51:34+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-05-14T19:39:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=51fe463018a311083195f95b3e4067f4b3833065'/>
<id>51fe463018a311083195f95b3e4067f4b3833065</id>
<content type='text'>
Will be used by KFD for MMIO based resets.

Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Will be used by KFD for MMIO based resets.

Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
