linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c, branch v7.3-rc2

drm/amd/pm: use milliwatts for GPU power sensors

2026-07-28T23:17:33+00:00

GPU average and input power backends report a mix of whole watts,
milliwatts, Q24.8 watts and decimal-packed fractions. Q24.8 is inherited
from the legacy PowerPlay sensor format. Milliwatts are a more natural unit
for the hwmon and pm_info consumers in amdgpu_pm.c. A common decoder cannot
distinguish these formats, and converting native milliwatts through Q24.8
also loses precision.

Use milliwatts as the internal unit across all PPT and PowerPlay backends.
Decode Q24.8 only at the legacy smu7 input boundary and encode it only for
the raw amdgpu_sensors debugfs interface. This gives hwmon, pm_info and the
sensor ioctl one unambiguous unit while preserving the format used by UMR.

Fixes: 5b79d0482f3c ("drm/amd/pp: Remove struct pp_gpu_power")
Fixes: 01992b121fb6 ("drm/amd/pm: fix amdgpu_pm_info power display units")
Signed-off-by: Yang Wang 
Reviewed-by: Kenneth Feng 
Reported-by: Lars Nieradzik 
Signed-off-by: Alex Deucher

drm/amdgpu: Drop vm_manager PASID to VM mapping

2026-07-28T22:44:54+00:00

VM lookup users now resolve DRM PASIDs through the global PASID xarray:

	PASID -> fpriv -> VM

The per-device vm_manager.pasids xarray is no longer needed.

Remove PASID registration and removal from the VM init/fini paths, drop
vm_manager PASID initialization/cleanup, and remove the xarray from
struct amdgpu_vm_manager.

The PASID is allocated only after amdgpu_vm_init() completes, so the
initializer no longer consumes or assigns a PASID. Remove the now-unused
argument while keeping vm->pasid as per-VM state for TLB flushes and
other hardware programming paths.

v6:
- Remove the now-unused PASID argument from amdgpu_vm_init().
- Remove the related vm->pasid assignment and error-path reset from VM
  init.
- Keep vm->pasid in struct amdgpu_vm for existing hardware users.

Cc: Alex Deucher 
Suggested-by: Christian König 
Signed-off-by: Srinivasan Shanmugam 
Reviewed-by: Christian König 
Signed-off-by: Alex Deucher

drm/amdgpu: Resolve VM through DRM PASID ownership

2026-07-28T22:29:34+00:00

Allocate DRM PASIDs with fpriv and resolve VM lookup users through:

	PASID -> fpriv -> VM

This preserves the root BO reference and revalidation flow in
amdgpu_vm_lock_by_pasid().

The obsolete per-device vm_manager.pasids mapping is removed by the
following patch in this series.

v6:
- Allocate and publish the DRM PASID after amdgpu_vm_init() completes.
- Assign the allocated PASID to vm->pasid in the DRM open path.
- Unpublish PASID ownership before tearing down the VM in both the
  open-failure and normal file-close paths.

v5:
- Delay DRM PASID allocation until after amdgpu_vm_init() completes.

v4:
- Allocate DRM PASIDs with fpriv directly.
- Squash ownership registration and PASID lookup conversion.

Cc: Alex Deucher 
Suggested-by: Christian König 
Signed-off-by: Srinivasan Shanmugam 
Reviewed-by: Christian König 
Signed-off-by: Alex Deucher

drm/amdgpu: Allow PASID allocator to store fpriv owner

2026-07-28T22:29:00+00:00

AMDGPU already has a global PASID xarray used for PASID allocation.

Allow amdgpu_pasid_alloc() to optionally store the owning DRM
file-private object directly.

Initial callers pass NULL. A later patch in this series passes the DRM
file-private object for DRM PASIDs.

This prepares for using:

	PASID -> fpriv -> VM

instead of:

	PASID -> VM

Clear the stored owner from amdgpu_pasid_free_delayed() before waiting
for outstanding fences so PASID lookups cannot observe a stale fpriv
while the PASID itself is pending delayed release.

v6:
- Correct the PASID allocator kernel-doc to refer to the XArray cyclic
  allocator.
- Document that PASID owner lookup may return NULL and that the returned
  fpriv remains valid only while the PASID lock is held.
- No code changes. Retain Christian's Reviewed-by tag.

v5:
- Store NULL instead of xa_mk_value(0) for ownerless PASIDs.
- Simplify owner clearing by unconditionally storing NULL.

v4:
- Add fpriv as an optional parameter to amdgpu_pasid_alloc().
- Drop separate amdgpu_pasid_set_fpriv()/clear_fpriv() helpers.
- Clear PASID owner from amdgpu_pasid_free_delayed().

Cc: Alex Deucher 
Suggested-by: Christian König 
Signed-off-by: Srinivasan Shanmugam 
Reviewed-by: Christian König 
Signed-off-by: Alex Deucher

drm/amdgpu: include amdgpu_video_codecs.h only where needed

2026-07-08T18:20:30+00:00

Remove #include "amdgpu_video_codecs.h" from amdgpu.h and add forward declaration
of struct amdgpu_video_codecs.

Add #include "amdgpu_video_codecs.h" into files amdgpu_kms.c, amdgpu_virt.c,
cik.c, nv.c, si.c, soc15.c, soc21.c, soc24.c, soc_v1_0.c, and vi.c.

Signed-off-by: Shahyan Soltani 
Reviewed-by: Christian König 
Signed-off-by: Alex Deucher

drm/amdgpu: Replace idr with xarray in amdgpu_bo_list

2026-07-01T15:07:13+00:00

IDR is deprecated so let's replace it with xarray.

Conversion is mostly 1:1 apart from AMDGPU_BO_LIST_OP_UPDATE which was
implemented with idr_replace, and has now been replaced with a sequence of
xa_load and xa_cmpxchg. Should userspace attempt multi-threaded update
operations on the same handle it could theoretically hit a new -ENOENT
path. But I believe this is purely theoretical and still safe.

Also, since we have removed the RCU protection around the handle lookup we
also removed the RCU freeing of the list.

Signed-off-by: Tvrtko Ursulin 
Reviewed-by: Christian König 
Signed-off-by: Alex Deucher

drm/amdgpu: add ioctl to handle RAS poison error

2026-06-17T19:51:36+00:00

Add a new DRM_IOCTL_AMDGPU_PROC_OPTIONS ioctl with the
AMDGPU_PROC_OPTIONS_OP_KFD_SIGBUS_DELAY option, allowing userspace (ROCr)
to control per-process SIGBUS delivery.

Userspace for this can be found at:
https://github.com/ROCm/rocm-systems/pull/6190

Reviewed-by: Lijo Lazar 
Reviewed-by: Alex Deucher 
Signed-off-by: Yifan Zhang 
Signed-off-by: Alex Deucher

drm/amdgpu: fix AMDGPU_INFO_READ_MMR_REG

2026-04-24T15:09:49+00:00

There were multiple issues in that code.

First of all the order between the reset semaphore and the mm_lock was
wrong (e.g. copy_to_user) was called while holding the lock.

Then we allocated memory while holding the reset semaphore which is also
a pretty big bug and can deadlock.

Then we used down_read_trylock() instead of waiting for the reset to
finish.

Signed-off-by: Christian König 
Fixes: 9e823f307074 ("drm/amdgpu: Block MMR_READ IOCTL in reset")
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher 
(cherry picked from commit 361b6e6b303d4b691f6c5974d3eaab67ca6dd90e)

drm/amdgpu: completely rework eviction fence handling v2

2026-03-17T21:46:13+00:00

Well that was broken on multiple levels.

First of all a lot of checks were placed at incorrect locations, especially if
the resume worker should run or not.

Then a bunch of code was just mid-layering because of incorrect assignment who
should do what.

And finally comments explaining what happens instead of why.

Just re-write it from scratch, that should at least fix some of the hangs we
are seeing.

Use RCU for the eviction fence pointer in the manager, the spinlock usage was
mostly incorrect as well. Then finally remove all the nonsense checks and
actually add them in the correct locations.

v2: some typo fixes and cleanups suggested by Sunil

Signed-off-by: Christian König 
Reviewed-by: Sunil Khatri 
Signed-off-by: Alex Deucher

drm/amd: Set num IP blocks to 0 if discovery fails

2026-03-11T17:58:08+00:00

If discovery has failed for any reason (such as no support for a block)
then there is no need to unwind all the IP blocks in fini. In this
condition there can actually be failures during the unwind too.

Reset num_ip_blocks to zero during failure path and skip the unnecessary
cleanup path.

Suggested-by: Lijo Lazar 
Reviewed-by: Lijo Lazar 
Signed-off-by: Mario Limonciello 
Signed-off-by: Alex Deucher