<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/gpio/Kconfig, branch v4.16</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>gpio: winbond: fix ISA_BUS_API dependency</title>
<updated>2018-01-11T09:17:32+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-01-11T08:35:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=92a8046c9d952a2a7d21dfcd3afadc72a0bc0f72'/>
<id>92a8046c9d952a2a7d21dfcd3afadc72a0bc0f72</id>
<content type='text'>
The newly added GPIO driver for winbond chipsets causes a
circular dependency warning in Kconfig:

drivers/gpio/Kconfig:13:error: recursive dependency detected!
drivers/gpio/Kconfig:13:	symbol GPIOLIB is selected by STX104
drivers/iio/adc/Kconfig:699:	symbol STX104 depends on ISA_BUS_API
arch/Kconfig:830:	symbol ISA_BUS_API is selected by GPIO_WINBOND
drivers/gpio/Kconfig:701:	symbol GPIO_WINBOND depends on GPIOLIB

The underlying problem is that ISA_BUS_API is not meant to be selected by
device drivers, instead it is provided by the architectures that support
ISA add-on card devices, or in case of x86 have this explicitly enabled.

This particular driver appears to be different from the other ISA_BUS_API
based drivers, in that it is not normally an add-on card (ISA or PC104)
but instead is an LPC-attached component on the mainboard. We already
support other functionality provided by this chip, at least
drivers/watchdog/w83627hf_wdt.c and drivers/hwmon/w83627ehf.c, plus
there is a discovery function for this hardware in
drivers/parport/parport_pc.c.

If we want to use this driver without having to enable CONFIG_EXPERT,
it might be better to not use the isa_bus_type for it, but rather
turn it into a platform_driver, acpi_driver or add an MFD for it that
is shared with the wdt and hwmon portions and does the probing.

For now, this patch fixes the dependency by changing 'select' into
'depends on'.

Cc: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Cc: Guenter Roeck &lt;linux@roeck-us.net&gt;
Cc: Maciej S. Szmigiero &lt;mail@maciej.szmigiero.name&gt;
Cc: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Fixes: a0d65009411c ("gpio: winbond: Add driver")
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The newly added GPIO driver for winbond chipsets causes a
circular dependency warning in Kconfig:

drivers/gpio/Kconfig:13:error: recursive dependency detected!
drivers/gpio/Kconfig:13:	symbol GPIOLIB is selected by STX104
drivers/iio/adc/Kconfig:699:	symbol STX104 depends on ISA_BUS_API
arch/Kconfig:830:	symbol ISA_BUS_API is selected by GPIO_WINBOND
drivers/gpio/Kconfig:701:	symbol GPIO_WINBOND depends on GPIOLIB

The underlying problem is that ISA_BUS_API is not meant to be selected by
device drivers, instead it is provided by the architectures that support
ISA add-on card devices, or in case of x86 have this explicitly enabled.

This particular driver appears to be different from the other ISA_BUS_API
based drivers, in that it is not normally an add-on card (ISA or PC104)
but instead is an LPC-attached component on the mainboard. We already
support other functionality provided by this chip, at least
drivers/watchdog/w83627hf_wdt.c and drivers/hwmon/w83627ehf.c, plus
there is a discovery function for this hardware in
drivers/parport/parport_pc.c.

If we want to use this driver without having to enable CONFIG_EXPERT,
it might be better to not use the isa_bus_type for it, but rather
turn it into a platform_driver, acpi_driver or add an MFD for it that
is shared with the wdt and hwmon portions and does the probing.

For now, this patch fixes the dependency by changing 'select' into
'depends on'.

Cc: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Cc: Guenter Roeck &lt;linux@roeck-us.net&gt;
Cc: Maciej S. Szmigiero &lt;mail@maciej.szmigiero.name&gt;
Cc: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Fixes: a0d65009411c ("gpio: winbond: Add driver")
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: Add GPIO support for the ACCES PCIe-IDIO-24 family</title>
<updated>2018-01-10T13:39:28+00:00</updated>
<author>
<name>William Breathitt Gray</name>
<email>vilhelm.gray@gmail.com</email>
</author>
<published>2018-01-09T22:21:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=58556204662812f4beec1bc8ee7685884037e0a4'/>
<id>58556204662812f4beec1bc8ee7685884037e0a4</id>
<content type='text'>
The ACCES PCIe-IDIO-24 device provides 56 lines of digital I/O (24 lines
of optically-isolated non-polarized digital inputs for AC and DC control
signals, 24 lines of isolated solid state FET digital outputs, and 8
non-isolated TTL/CMOS compatible programmable I/O). An interrupt is
generated when any of the inputs change state (low to high or high to
low).

Input filter control is not supported by this driver, and input filters
are deactivated by this driver. These devices are capable of
get_multiple and set_multiple functionality, but these functions have
not yet been implemented for this driver. Change-Of-State (COS)
detection functionality may be configured to fire interrupts on
exclusively rising/falling edges, but this driver currently only
implements COS detection for either both edges or none.

Signed-off-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The ACCES PCIe-IDIO-24 device provides 56 lines of digital I/O (24 lines
of optically-isolated non-polarized digital inputs for AC and DC control
signals, 24 lines of isolated solid state FET digital outputs, and 8
non-isolated TTL/CMOS compatible programmable I/O). An interrupt is
generated when any of the inputs change state (low to high or high to
low).

Input filter control is not supported by this driver, and input filters
are deactivated by this driver. These devices are capable of
get_multiple and set_multiple functionality, but these functions have
not yet been implemented for this driver. Change-Of-State (COS)
detection functionality may be configured to fire interrupts on
exclusively rising/falling edges, but this driver currently only
implements COS detection for either both edges or none.

Signed-off-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: winbond: Add driver</title>
<updated>2018-01-09T13:51:00+00:00</updated>
<author>
<name>Maciej S. Szmigiero</name>
<email>mail@maciej.szmigiero.name</email>
</author>
<published>2018-01-05T23:46:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a0d65009411c620a9e7140d6a83b9d5aeb8f1801'/>
<id>a0d65009411c620a9e7140d6a83b9d5aeb8f1801</id>
<content type='text'>
This commit adds GPIO driver for Winbond Super I/Os.

Currently, only W83627UHG model (also known as Nuvoton NCT6627UD)
is supported but in the future a support for other Winbond models,
too, can be added to the driver.

A module parameter "gpios" sets a bitmask of GPIO ports to enable
(bit 0 is GPIO1, bit 1 is GPIO2, etc.).

One should be careful which ports one tinkers with since some
might be managed by the firmware (for functions like powering on and
off, sleeping, BIOS recovery, etc.) and some of GPIO port pins are
physically shared with other devices included in the Super I/O chip.

Signed-off-by: Maciej S. Szmigiero &lt;mail@maciej.szmigiero.name&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This commit adds GPIO driver for Winbond Super I/Os.

Currently, only W83627UHG model (also known as Nuvoton NCT6627UD)
is supported but in the future a support for other Winbond models,
too, can be added to the driver.

A module parameter "gpios" sets a bitmask of GPIO ports to enable
(bit 0 is GPIO1, bit 1 is GPIO2, etc.).

One should be careful which ports one tinkers with since some
might be managed by the firmware (for functions like powering on and
off, sleeping, BIOS recovery, etc.) and some of GPIO port pins are
physically shared with other devices included in the Super I/O chip.

Signed-off-by: Maciej S. Szmigiero &lt;mail@maciej.szmigiero.name&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: move gpio-axp209 to pinctrl</title>
<updated>2017-12-07T09:05:30+00:00</updated>
<author>
<name>Quentin Schulz</name>
<email>quentin.schulz@free-electrons.com</email>
</author>
<published>2017-12-05T14:46:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=449317a8b4c4ed47c2a51f864c4697ae57195b96'/>
<id>449317a8b4c4ed47c2a51f864c4697ae57195b96</id>
<content type='text'>
To prepare the driver for the upcoming pinctrl features, move the GPIO
driver AXP209 from GPIO to pinctrl subsystem.

Signed-off-by: Quentin Schulz &lt;quentin.schulz@free-electrons.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Acked-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
To prepare the driver for the upcoming pinctrl features, move the GPIO
driver AXP209 from GPIO to pinctrl subsystem.

Signed-off-by: Quentin Schulz &lt;quentin.schulz@free-electrons.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Acked-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2017-11-16T18:57:11+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-11-16T18:57:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b630a23a731a436f9edbd9fa00739aaa3e174c15'/>
<id>b630a23a731a436f9edbd9fa00739aaa3e174c15</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.15 kernel cycle:

  Core:

   - The pin control Kconfig entry PINCTRL is now turned into a
     menuconfig option. This obviously has the implication of making the
     subsystem menu visible in menuconfig. This is happening because of
     two things:

      (a) Intel have started to deploy and depend on pin controllers in
          a way that is affecting users directly. This happens on the
          highly integrated laptop chipsets named after geographical
          places: baytrail, broxton, cannonlake, cedarfork, cherryview,
          denverton, geminilake, lewisburg, merrifield, sunrisepoint...
          It started a while back and now it is ever more evident that
          this is crucial infrastructure for x86 laptops and not an
          embedded obscurity anymore. Users need to be aware.

      (b) Pin control expanders on I2C and SPI that are arch-agnostic.
          Currently Semtech SX150X and Microchip MCP28x08 but more are
          expected. Users will have to be able to configure these in
          directly for their set-up.

   - Just go and select GPIOLIB now that we made sure that GPIOLIB is a
     very vanilla subsystem. Do not depend on it, if we need it, select
     it.

   - Exposing the pin control subsystem in menuconfig uncovered a bunch
     of obscure bugs that are now hopefully fixed, all more or less
     pertaining to Blackfin.

   - Unified namespace for cross-calls between pin control and GPIO.

   - New support for clock skew/delay generic DT bindings and generic
     pin config options for this.

   - Minor documentation improvements.

  Various:

   - The Renesas SH-PFC pin controller has evolved a lot. It seems
     Renesas are churning out new SoCs by the minute.

   - A bunch of non-critical fixes for the Rockchip driver.

   - Improve the use of library functions instead of open coding.

   - Support the MCP28018 variant in the MCP28x08 driver.

   - Static constifying"

* tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (91 commits)
  pinctrl: gemini: Fix missing pad descriptions
  pinctrl: Add some depends on HAS_IOMEM
  pinctrl: samsung/s3c24xx: add CONFIG_OF dependency
  pinctrl: gemini: Fix GMAC groups
  pinctrl: qcom: spmi-gpio: Add pmi8994 gpio support
  pinctrl: ti-iodelay: remove redundant unused variable dev
  pinctrl: max77620: Use common error handling code in max77620_pinconf_set()
  pinctrl: gemini: Implement clock skew/delay config
  pinctrl: gemini: Use generic DT parser
  pinctrl: Add skew-delay pin config and bindings
  pinctrl: armada-37xx: Add edge both type gpio irq support
  pinctrl: uniphier: remove eMMC hardware reset pin-mux
  pinctrl: rockchip: Add iomux-route switching support for rk3288
  pinctrl: intel: Add Intel Cedar Fork PCH pin controller support
  pinctrl: intel: Make offset to interrupt status register configurable
  pinctrl: sunxi: Enforce the strict mode by default
  pinctrl: sunxi: Disable strict mode for old pinctrl drivers
  pinctrl: sunxi: Introduce the strict flag
  pinctrl: sh-pfc: Save/restore registers for PSCI system suspend
  pinctrl: sh-pfc: r8a7796: Use generic IOCTRL register description
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.15 kernel cycle:

  Core:

   - The pin control Kconfig entry PINCTRL is now turned into a
     menuconfig option. This obviously has the implication of making the
     subsystem menu visible in menuconfig. This is happening because of
     two things:

      (a) Intel have started to deploy and depend on pin controllers in
          a way that is affecting users directly. This happens on the
          highly integrated laptop chipsets named after geographical
          places: baytrail, broxton, cannonlake, cedarfork, cherryview,
          denverton, geminilake, lewisburg, merrifield, sunrisepoint...
          It started a while back and now it is ever more evident that
          this is crucial infrastructure for x86 laptops and not an
          embedded obscurity anymore. Users need to be aware.

      (b) Pin control expanders on I2C and SPI that are arch-agnostic.
          Currently Semtech SX150X and Microchip MCP28x08 but more are
          expected. Users will have to be able to configure these in
          directly for their set-up.

   - Just go and select GPIOLIB now that we made sure that GPIOLIB is a
     very vanilla subsystem. Do not depend on it, if we need it, select
     it.

   - Exposing the pin control subsystem in menuconfig uncovered a bunch
     of obscure bugs that are now hopefully fixed, all more or less
     pertaining to Blackfin.

   - Unified namespace for cross-calls between pin control and GPIO.

   - New support for clock skew/delay generic DT bindings and generic
     pin config options for this.

   - Minor documentation improvements.

  Various:

   - The Renesas SH-PFC pin controller has evolved a lot. It seems
     Renesas are churning out new SoCs by the minute.

   - A bunch of non-critical fixes for the Rockchip driver.

   - Improve the use of library functions instead of open coding.

   - Support the MCP28018 variant in the MCP28x08 driver.

   - Static constifying"

* tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (91 commits)
  pinctrl: gemini: Fix missing pad descriptions
  pinctrl: Add some depends on HAS_IOMEM
  pinctrl: samsung/s3c24xx: add CONFIG_OF dependency
  pinctrl: gemini: Fix GMAC groups
  pinctrl: qcom: spmi-gpio: Add pmi8994 gpio support
  pinctrl: ti-iodelay: remove redundant unused variable dev
  pinctrl: max77620: Use common error handling code in max77620_pinconf_set()
  pinctrl: gemini: Implement clock skew/delay config
  pinctrl: gemini: Use generic DT parser
  pinctrl: Add skew-delay pin config and bindings
  pinctrl: armada-37xx: Add edge both type gpio irq support
  pinctrl: uniphier: remove eMMC hardware reset pin-mux
  pinctrl: rockchip: Add iomux-route switching support for rk3288
  pinctrl: intel: Add Intel Cedar Fork PCH pin controller support
  pinctrl: intel: Make offset to interrupt status register configurable
  pinctrl: sunxi: Enforce the strict mode by default
  pinctrl: sunxi: Disable strict mode for old pinctrl drivers
  pinctrl: sunxi: Introduce the strict flag
  pinctrl: sh-pfc: Save/restore registers for PSCI system suspend
  pinctrl: sh-pfc: r8a7796: Use generic IOCTRL register description
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio</title>
<updated>2017-11-15T01:23:44+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-11-15T01:23:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6aa2f9441f1ef21f10c41f45e6453b135e9cd736'/>
<id>6aa2f9441f1ef21f10c41f45e6453b135e9cd736</id>
<content type='text'>
Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v4.15 kernel cycle:

  Core:

   - Fix the semantics of raw GPIO to actually be raw. No inversion
     semantics as before, but also no open draining, and allow the raw
     operations to affect lines used for interrupts as the caller
     supposedly knows what they are doing if they are getting the big
     hammer.

   - Rewrote the __inner_function() notation calls to names that make
     more sense. I just find this kind of code disturbing.

   - Drop the .irq_base() field from the gpiochip since now all IRQs are
     mapped dynamically. This is nice.

   - Support for .get_multiple() in the core driver API. This allows us
     to read several GPIO lines with a single register read. This has
     high value for some usecases: it can be used to create
     oscilloscopes and signal analyzers and other things that rely on
     reading several lines at exactly the same instant. Also a generally
     nice optimization. This uses the new assign_bit() macro from the
     bitops lib that was ACKed by Andrew Morton and is implemented for
     two drivers, one of them being the generic MMIO driver so everyone
     using that will be able to benefit from this.

   - Do not allow requests of Open Drain and Open Source setting of a
     GPIO line simultaneously. If the hardware actually supports
     enabling both at the same time the electrical result would be
     disastrous.

   - A new interrupt chip core helper. This will be helpful to deal with
     "banked" GPIOs, which means GPIO controllers with several logical
     blocks of GPIO inside them. This is several gpiochips per device in
     the device model, in contrast to the case when there is a 1-to-1
     relationship between a device and a gpiochip.

  New drivers:

   - Maxim MAX3191x industrial serializer, a very interesting piece of
     professional I/O hardware.

   - Uniphier GPIO driver. This is the GPIO block from the recent
     Socionext (ex Fujitsu and Panasonic) platform.

   - Tegra 186 driver. This is based on the new banked GPIO
     infrastructure.

  Other improvements:

   - Some documentation improvements.

   - Wakeup support for the DesignWare DWAPB GPIO controller.

   - Reset line support on the DesignWare DWAPB GPIO controller.

   - Several non-critical bug fixes and improvements for the Broadcom
     BRCMSTB driver.

   - Misc non-critical bug fixes like exotic errorpaths, removal of dead
     code etc.

   - Explicit comments on fall-through switch() statements"

* tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (65 commits)
  gpio: tegra186: Remove tegra186_gpio_lock_class
  gpio: rcar: Add r8a77995 (R-Car D3) support
  pinctrl: bcm2835: Fix some merge fallout
  gpio: Fix undefined lock_dep_class
  gpio: Automatically add lockdep keys
  gpio: Introduce struct gpio_irq_chip.first
  gpio: Disambiguate struct gpio_irq_chip.nested
  gpio: Add Tegra186 support
  gpio: Export gpiochip_irq_{map,unmap}()
  gpio: Implement tighter IRQ chip integration
  gpio: Move lock_key into struct gpio_irq_chip
  gpio: Move irq_valid_mask into struct gpio_irq_chip
  gpio: Move irq_nested into struct gpio_irq_chip
  gpio: Move irq_chained_parent to struct gpio_irq_chip
  gpio: Move irq_default_type to struct gpio_irq_chip
  gpio: Move irq_handler to struct gpio_irq_chip
  gpio: Move irqdomain into struct gpio_irq_chip
  gpio: Move irqchip into struct gpio_irq_chip
  gpio: Introduce struct gpio_irq_chip
  pinctrl: armada-37xx: remove unused variable
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v4.15 kernel cycle:

  Core:

   - Fix the semantics of raw GPIO to actually be raw. No inversion
     semantics as before, but also no open draining, and allow the raw
     operations to affect lines used for interrupts as the caller
     supposedly knows what they are doing if they are getting the big
     hammer.

   - Rewrote the __inner_function() notation calls to names that make
     more sense. I just find this kind of code disturbing.

   - Drop the .irq_base() field from the gpiochip since now all IRQs are
     mapped dynamically. This is nice.

   - Support for .get_multiple() in the core driver API. This allows us
     to read several GPIO lines with a single register read. This has
     high value for some usecases: it can be used to create
     oscilloscopes and signal analyzers and other things that rely on
     reading several lines at exactly the same instant. Also a generally
     nice optimization. This uses the new assign_bit() macro from the
     bitops lib that was ACKed by Andrew Morton and is implemented for
     two drivers, one of them being the generic MMIO driver so everyone
     using that will be able to benefit from this.

   - Do not allow requests of Open Drain and Open Source setting of a
     GPIO line simultaneously. If the hardware actually supports
     enabling both at the same time the electrical result would be
     disastrous.

   - A new interrupt chip core helper. This will be helpful to deal with
     "banked" GPIOs, which means GPIO controllers with several logical
     blocks of GPIO inside them. This is several gpiochips per device in
     the device model, in contrast to the case when there is a 1-to-1
     relationship between a device and a gpiochip.

  New drivers:

   - Maxim MAX3191x industrial serializer, a very interesting piece of
     professional I/O hardware.

   - Uniphier GPIO driver. This is the GPIO block from the recent
     Socionext (ex Fujitsu and Panasonic) platform.

   - Tegra 186 driver. This is based on the new banked GPIO
     infrastructure.

  Other improvements:

   - Some documentation improvements.

   - Wakeup support for the DesignWare DWAPB GPIO controller.

   - Reset line support on the DesignWare DWAPB GPIO controller.

   - Several non-critical bug fixes and improvements for the Broadcom
     BRCMSTB driver.

   - Misc non-critical bug fixes like exotic errorpaths, removal of dead
     code etc.

   - Explicit comments on fall-through switch() statements"

* tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (65 commits)
  gpio: tegra186: Remove tegra186_gpio_lock_class
  gpio: rcar: Add r8a77995 (R-Car D3) support
  pinctrl: bcm2835: Fix some merge fallout
  gpio: Fix undefined lock_dep_class
  gpio: Automatically add lockdep keys
  gpio: Introduce struct gpio_irq_chip.first
  gpio: Disambiguate struct gpio_irq_chip.nested
  gpio: Add Tegra186 support
  gpio: Export gpiochip_irq_{map,unmap}()
  gpio: Implement tighter IRQ chip integration
  gpio: Move lock_key into struct gpio_irq_chip
  gpio: Move irq_valid_mask into struct gpio_irq_chip
  gpio: Move irq_nested into struct gpio_irq_chip
  gpio: Move irq_chained_parent to struct gpio_irq_chip
  gpio: Move irq_default_type to struct gpio_irq_chip
  gpio: Move irq_handler to struct gpio_irq_chip
  gpio: Move irqdomain into struct gpio_irq_chip
  gpio: Move irqchip into struct gpio_irq_chip
  gpio: Introduce struct gpio_irq_chip
  pinctrl: armada-37xx: remove unused variable
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'gpio-irqchip-rework' of /home/linus/linux-gpio into devel</title>
<updated>2017-11-09T08:38:42+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2017-11-09T08:38:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=bee67c7c9d7d3252dce69c960a53e53fd6b04e09'/>
<id>bee67c7c9d7d3252dce69c960a53e53fd6b04e09</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: Add Tegra186 support</title>
<updated>2017-11-08T13:14:51+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2017-11-07T18:15:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5b2b135a87fcfb2b27c3c192fd7c3b053f0c5fa2'/>
<id>5b2b135a87fcfb2b27c3c192fd7c3b053f0c5fa2</id>
<content type='text'>
Tegra186 has two GPIO controllers that are largely register compatible
between one another but are completely different from the controller
found on earlier generations.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tegra186 has two GPIO controllers that are largely register compatible
between one another but are completely different from the controller
found on earlier generations.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: mb86s7x: share with other SoCs as module</title>
<updated>2017-10-31T12:11:38+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ard.biesheuvel@linaro.org</email>
</author>
<published>2017-10-27T20:21:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e1289dba18bf905870a42b994c003586688d9353'/>
<id>e1289dba18bf905870a42b994c003586688d9353</id>
<content type='text'>
In order to reuse this driver for the Socionext Synquacer SC2A11 SoC,
which inherited this IP from Fujitsu, remove the ARCH_MB86S7X Kconfig
dependency, and revert the changes that prevent it from being built as
a module.

This reverts commits d65aa4b67b4f47f303bdeaef1e4d42ef18e6b293 and
d5610e514e92144d19bd5e39e5cf3804bbf85f3e.

Cc: Geliang Tang &lt;geliangtang@gmail.com&gt;
Cc: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
[Folded in module_platform_driver() fixup]
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In order to reuse this driver for the Socionext Synquacer SC2A11 SoC,
which inherited this IP from Fujitsu, remove the ARCH_MB86S7X Kconfig
dependency, and revert the changes that prevent it from being built as
a module.

This reverts commits d65aa4b67b4f47f303bdeaef1e4d42ef18e6b293 and
d5610e514e92144d19bd5e39e5cf3804bbf85f3e.

Cc: Geliang Tang &lt;geliangtang@gmail.com&gt;
Cc: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
[Folded in module_platform_driver() fixup]
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: brcmstb: consolidate interrupt domains</title>
<updated>2017-10-31T09:34:40+00:00</updated>
<author>
<name>Doug Berger</name>
<email>opendmb@gmail.com</email>
</author>
<published>2017-10-24T19:54:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0ba31dc201deb4f47277d7ff676b45da31c530e4'/>
<id>0ba31dc201deb4f47277d7ff676b45da31c530e4</id>
<content type='text'>
The GPIOLIB IRQ chip helpers were very appealing, but badly broke
the 1:1 mapping between a GPIO controller's device_node and its
interrupt domain.

When another device-tree node references a GPIO device as its
interrupt parent, the irq_create_of_mapping() function looks for
the irq domain of the GPIO device and since all bank irq domains
reference the same GPIO device node it always resolves to the irq
domain of the first bank regardless of which bank the number of
the GPIO should resolve. This domain can only map hwirq numbers
0-31 so interrupts on GPIO above that can't be mapped by the
device-tree.

This commit effectively reverts the patch from Gregory Fong [1]
that was accepted upstream and replaces it with a consolidated
irq domain implementation with one larger interrupt domain per
GPIO controller instance spanning multiple GPIO banks based on
an earlier patch [2] also submitted by Gregory Fong.

[1] https://patchwork.kernel.org/patch/6921561/
[2] https://patchwork.kernel.org/patch/6347811/

Fixes: 19a7b6940b78 ("gpio: brcmstb: Add interrupt and wakeup source support")
Signed-off-by: Doug Berger &lt;opendmb@gmail.com&gt;
Reviewed-by: Gregory Fong &lt;gregory.0xf0@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The GPIOLIB IRQ chip helpers were very appealing, but badly broke
the 1:1 mapping between a GPIO controller's device_node and its
interrupt domain.

When another device-tree node references a GPIO device as its
interrupt parent, the irq_create_of_mapping() function looks for
the irq domain of the GPIO device and since all bank irq domains
reference the same GPIO device node it always resolves to the irq
domain of the first bank regardless of which bank the number of
the GPIO should resolve. This domain can only map hwirq numbers
0-31 so interrupts on GPIO above that can't be mapped by the
device-tree.

This commit effectively reverts the patch from Gregory Fong [1]
that was accepted upstream and replaces it with a consolidated
irq domain implementation with one larger interrupt domain per
GPIO controller instance spanning multiple GPIO banks based on
an earlier patch [2] also submitted by Gregory Fong.

[1] https://patchwork.kernel.org/patch/6921561/
[2] https://patchwork.kernel.org/patch/6347811/

Fixes: 19a7b6940b78 ("gpio: brcmstb: Add interrupt and wakeup source support")
Signed-off-by: Doug Berger &lt;opendmb@gmail.com&gt;
Reviewed-by: Gregory Fong &lt;gregory.0xf0@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
