linux.git/drivers/edac, branch v4.6-rc2

Merge tag 'edac_for_4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

2016-03-16T15:36:55+00:00

Pull EDAC updates from Borislav Petkov:

 - Altera: L2 cache and On-Chip RAM support (Thor Thayer).

 - EDAC: Workqueue handling cleanups (Borislav Petkov).

 - Xgene: Register bus error handling (Loc Ho).

 - Misc small fixes.

* tag 'edac_for_4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  ARM: socfpga: Enable OCRAM ECC on startup
  ARM: socfpga: Enable L2 cache ECC on startup
  ARM: dts: Add Altera L2 Cache and OCRAM EDAC entries
  EDAC, altera: Add Altera L2 cache and OCRAM support
  EDAC: Use edac_debugfs_remove_recursive() in edac_debugfs_exit()
  EDAC, mpc85xx: Silence unused variable warning
  EDAC: Cleanup/sync workqueue functions
  EDAC: Kill workqueue setup/teardown functions
  EDAC: Balance workqueue setup and teardown
  arm64: Update the APM X-Gene EDAC node with the RB register resource
  EDAC, xgene: Add missing SoC register bus error handling
  Documentation, EDAC: Update xgene binding for missing register bus
  EDAC, amd64_edac: Shift wrapping issue in f1x_get_norm_dct_addr()

Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2016-03-15T01:43:51+00:00

Pull RAS updates from Ingo Molnar:
 "Various RAS updates:

   - AMD MCE support updates for future CPUs, fixes and 'SMCA' (Scalable
     MCA) error decoding support (Aravind Gopalakrishnan)

   - x86 memcpy_mcsafe() support, to enable smart(er) hardware error
     recovery in NVDIMM drivers, based on an extension of the x86
     exception handling code.  (Tony Luck)"

* 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  EDAC/sb_edac: Fix computation of channel address
  x86/mm, x86/mce: Add memcpy_mcsafe()
  x86/mce/AMD: Document some functionality
  x86/mce: Clarify comments regarding deferred error
  x86/mce/AMD: Fix logic to obtain block address
  x86/mce/AMD, EDAC: Enable error decoding of Scalable MCA errors
  x86/mce: Move MCx_CONFIG MSR definitions
  x86/mce: Check for faults tagged in EXTABLE_CLASS_FAULT exception table entries
  x86/mm: Expand the exception table logic to allow new handling options
  x86/mce/AMD: Set MCAX Enable bit
  x86/mce/AMD: Carve out threshold block preparation
  x86/mce/AMD: Fix LVT offset configuration for thresholding
  x86/mce/AMD: Reduce number of blocks scanned per bank
  x86/mce/AMD: Do not perform shared bank check for future processors
  x86/mce: Fix order of AMD MCE init function call

EDAC/sb_edac: Fix computation of channel address

2016-03-10T17:31:55+00:00

Large memory Haswell-EX systems with multiple DIMMs per channel were
sometimes reporting the wrong DIMM.

Found three problems:

 1) Debug printouts for socket and channel interleave were not interpreting
    the register fields correctly. The socket interleave field is a 2^X
    value (0=1, 1=2, 2=4, 3=8). The channel interleave is X+1 (0=1, 1=2,
    2=3. 3=4).

 2) Actual use of the socket interleave value didn't interpret as 2^X

 3) Conversion of address to channel address was complicated, and wrong.

Signed-off-by: Tony Luck 
Acked-by: Aristeu Rozanski 
Cc: Borislav Petkov 
Cc: Linus Torvalds 
Cc: Mauro Carvalho Chehab 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: linux-edac@vger.kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: Ingo Molnar

x86/mce/AMD, EDAC: Enable error decoding of Scalable MCA errors

2016-03-08T10:48:14+00:00

For Scalable MCA enabled processors, errors are listed per IP block. And
since it is not required for an IP to map to a particular bank, we need
to use HWID and McaType values from the MCx_IPID register to figure out
which IP a given bank represents.

We also have a new bit (TCC) in the MCx_STATUS register to indicate Task
context is corrupt.

Add logic here to decode errors from all known IP blocks for Fam17h
Model 00-0fh and to print TCC errors.

[ Minor fixups. ]
Signed-off-by: Aravind Gopalakrishnan 
Signed-off-by: Borislav Petkov 
Cc: Borislav Petkov 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1457021458-2522-3-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Ingo Molnar

EDAC, sb_edac: Fix logic when computing DIMM sizes on Xeon Phi

2016-03-07T18:07:40+00:00

Correct a typo introduced by

  d0cdf9003140 ("EDAC, sb_edac: Add Knights Landing (Xeon Phi gen 2) support")

As a result under some configurations DIMMs were not correctly
recognized. Problem affects only Xeon Phi architecture.

Signed-off-by: Hubert Chrzaniuk 
Acked-by: Aristeu Rozanski 
Cc: Mauro Carvalho Chehab 
Cc: linux-edac 
Cc: lukasz.anaczkowski@intel.com
Link: http://lkml.kernel.org/r/1457361045-26221-1-git-send-email-hubert.chrzaniuk@intel.com
Signed-off-by: Borislav Petkov

EDAC, altera: Add Altera L2 cache and OCRAM support

2016-02-11T11:23:06+00:00

Add L2 Cache and On-Chip RAM EDAC support for the Altera SoCs. The SDRAM
controller is using the Memory Controller model.

Each type of ECC is individually configurable.

Signed-off-by: Thor Thayer 
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-doc@vger.kernel.org
Cc: linux-edac 
Cc: mark.rutland@arm.com
Cc: Mauro Carvalho Chehab 
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Link: http://lkml.kernel.org/r/1455132384-17108-1-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov

EDAC: Use edac_debugfs_remove_recursive() in edac_debugfs_exit()

2016-02-10T09:37:46+00:00

debugfs_remove() is used to remove a file or a directory from the
debugfs filesystem on an EDAC device exit. However edac_debugfs might
not be empty. This is similar to

  30f84a891bf6 ("EDAC: Use edac_debugfs_remove_recursive()")

which changed the EDAC MCI code to use edac_debugfs_remove_recursive().

Suggested-by: Borislav Petkov 
Signed-off-by: Thor Thayer 
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1455064165-3816-1-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov

EDAC, mpc85xx: Silence unused variable warning

2016-02-02T17:53:15+00:00

We were getting this build warning:

  drivers/edac/mpc85xx_edac.c:1247:6: warning: unused variable 'pvr'

pvr is only used if CONFIG_FSL_SOC_BOOKE is defined. Declare it
__maybe_unused.

Suggested-by: Guenter Roeck 
Signed-off-by: Sudip Mukherjee 
Reviewed-by: Johannes Thumshirn 
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1454427573-7994-1-git-send-email-sudipm.mukherjee@gmail.com
Signed-off-by: Borislav Petkov

EDAC: Cleanup/sync workqueue functions

2016-02-02T10:38:50+00:00

They're both running only when ->edac_check is initialized so remove
that check from the workqueue function itself. Synchronize/generalize
the ->op_state check between the two.

Kill useless comments, while at it.

Signed-off-by: Borislav Petkov

EDAC: Kill workqueue setup/teardown functions

2016-02-02T10:38:43+00:00

We have the generic wrappers now, use those. edac_pci_workq_setup() had
an unused argument anyway.

Signed-off-by: Borislav Petkov