linux.git/drivers/edac/mce_amd.c, branch v5.8

x86/mce: Fix all mce notifiers to update the mce->kflags bitmask

2020-04-14T13:59:26+00:00

If the handler took any action to log or deal with the error, set a bit
in mce->kflags so that the default handler on the end of the machine
check chain can see what has been done.

Get rid of NOTIFY_STOP returns. Make the EDAC and dev-mcelog handlers
skip over errors already processed by CEC.

Signed-off-by: Tony Luck 
Signed-off-by: Borislav Petkov 
Tested-by: Tony Luck 
Link: https://lkml.kernel.org/r/20200214222720.13168-5-tony.luck@intel.com

x86/mce/amd, edac: Remove report_gart_errors

2020-04-14T13:53:46+00:00

... because no one should be interested in spurious MCEs anyway. Make
the filtering unconditional and move it to amd_filter_mce().

Signed-off-by: Borislav Petkov 
Tested-by: Tony Luck 
Link: https://lkml.kernel.org/r/20200407163414.18058-2-bp@alien8.de

EDAC/mce_amd: Print !SMCA processor warning only once

2020-02-18T16:20:41+00:00

This warning is output for every virtual CPU in a guest on an EPYC 2
system because kvm doesn't enable SMCA. Once is enough too.

 [ bp: Massage. ]

Signed-off-by: Prarit Bhargava 
Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/20200217134627.19765-1-prarit@redhat.com

EDAC/mce_amd: Make fam_ops static global

2020-01-16T20:52:48+00:00

... and do not kmalloc a three-pointer struct. Which simplifies
mce_amd_init() a bit.

No functional changes.

Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/20200116163403.GF27148@zn.tnic

EDAC/mce_amd: Always load on SMCA systems

2020-01-16T16:09:13+00:00

MCA error decoding on SMCA systems is not dependent on family. Return
success early if the system supports the SMCA feature.

Signed-off-by: Yazen Ghannam 
Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/20200110015651.14887-3-Yazen.Ghannam@amd.com

x86/MCE/AMD, EDAC/mce_amd: Add new Load Store unit McaType

2020-01-16T16:09:02+00:00

Add support for a new version of the Load Store unit bank type as
indicated by its McaType value, which will be present in future SMCA
systems.

Add the new (HWID, MCATYPE) tuple. Reuse the same name, since this is
logically the same to the user.

Also, add the new error descriptions to edac_mce_amd.

Signed-off-by: Yazen Ghannam 
Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/20200110015651.14887-2-Yazen.Ghannam@amd.com

treewide: Add SPDX license identifier for more missed files

2019-05-21T08:50:45+00:00

Add SPDX license identifiers to all files which:

 - Have no license information of any form

 - Have MODULE_LICENCE("GPL*") inside which was used in the initial
   scan/conversion to ignore the file

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner 
Signed-off-by: Greg Kroah-Hartman

x86/MCE/AMD: Don't report L1 BTB MCA errors on some family 17h models

2019-04-23T16:16:07+00:00

AMD family 17h Models 10h-2Fh may report a high number of L1 BTB MCA
errors under certain conditions. The errors are benign and can safely be
ignored. However, the high error rate may cause the MCA threshold
counter to overflow causing a high rate of thresholding interrupts.

In addition, users may see the errors reported through the AMD MCE
decoder module, even with the interrupt disabled, due to MCA polling.

Clear the "Counter Present" bit in the Instruction Fetch bank's
MCA_MISC0 register. This will prevent enabling MCA thresholding on this
bank which will prevent the high interrupt rate due to this error.

Define an AMD-specific function to filter these errors from the MCE
event pool so that they don't get reported during early boot.

Rename filter function in EDAC/mce_amd to avoid a naming conflict, while
at it.

 [ bp: Move function prototype to the internal header and
   massage/cleanup, fix typos. ]

Reported-by: Rafał Miłecki 
Signed-off-by: Yazen Ghannam 
Signed-off-by: Borislav Petkov 
Cc: "H. Peter Anvin" 
Cc: "clemej@gmail.com" 
Cc: Arnd Bergmann 
Cc: Ingo Molnar 
Cc: James Morse 
Cc: Kees Cook 
Cc: Mauro Carvalho Chehab 
Cc: Pu Wen 
Cc: Qiuxu Zhuo 
Cc: Shirish S 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Cc: Vishal Verma 
Cc: linux-edac 
Cc: x86-ml 
Cc:  # 5.0.x: c95b323dcd35: x86/MCE/AMD: Turn off MC4_MISC thresholding on all family 0x15 models
Cc:  # 5.0.x: 30aa3d26edb0: x86/MCE/AMD: Carve out the MC4_MISC thresholding quirk
Cc:  # 5.0.x: 9308fd407455: x86/MCE: Group AMD function prototypes in 
Cc:  # 5.0.x
Link: https://lkml.kernel.org/r/20190325163410.171021-2-Yazen.Ghannam@amd.com

EDAC/mce_amd: Decode MCA_STATUS in bit definition order

2019-02-15T13:36:31+00:00

Sort the MCA_STATUS bits in decode output to follow how they are defined
in the register.

The order is as follows:

  Bit | Decode
  ------------
  62  | Over
  61  | UC
  59  | MiscV
  58  | AddrV
  57  | PCC
  55  | TCC
  53  | SyndV
  46  | CECC
  45  | UECC
  44  | Deferred
  43  | Poison
  40  | Scrub

 [ bp: Massage a bit. ]

Signed-off-by: Yazen Ghannam 
Signed-off-by: Borislav Petkov 
Cc: Mauro Carvalho Chehab 
Cc: linux-edac 
Cc: x86@kernel.org
Link: https://lkml.kernel.org/r/20190212212417.107049-2-Yazen.Ghannam@amd.com

EDAC/mce_amd: Decode MCA_STATUS[Scrub] bit

2019-02-15T13:25:58+00:00

Previous AMD systems have had a bit in MCA_STATUS to indicate that an
error was detected on a scrub operation. However, this bit was defined
differently within different banks and families/models.

Starting with Family 17h, MCA_STATUS[40] is either Reserved/Read-as-Zero
or defined as "Scrub", for all MCA banks and CPU models. Therefore, this
bit can be defined as the "Scrub" bit.

Define MCA_STATUS[40] as "Scrub" and decode it in the AMD MCE decoding
module for Family 17h and newer systems.

Signed-off-by: Yazen Ghannam 
Signed-off-by: Borislav Petkov 
Cc: "H. Peter Anvin" 
Cc: Ingo Molnar 
Cc: James Morse 
Cc: linux-edac 
Cc: Mauro Carvalho Chehab 
Cc: Pu Wen 
Cc: Qiuxu Zhuo 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Cc: Vishal Verma 
Cc: x86-ml 
Link: https://lkml.kernel.org/r/20190212212417.107049-1-Yazen.Ghannam@amd.com