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<title>linux.git/drivers/dma/fsl_raid.c, branch v4.2</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>dmaengine: fsl_raid: statify fsl_re_chan_probe</title>
<updated>2015-04-02T10:41:35+00:00</updated>
<author>
<name>Vinod Koul</name>
<email>vinod.koul@intel.com</email>
</author>
<published>2015-04-02T10:41:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=453dcdb5ba048011d823cd31710f78ce2fd57da3'/>
<id>453dcdb5ba048011d823cd31710f78ce2fd57da3</id>
<content type='text'>
Function fsl_re_chan_probe should be declared static, so do it

Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Function fsl_re_chan_probe should be declared static, so do it

Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dmaengine: Driver support for FSL RaidEngine device.</title>
<updated>2015-04-02T10:40:27+00:00</updated>
<author>
<name>Xuelin Shi</name>
<email>xuelin.shi@freescale.com</email>
</author>
<published>2015-03-03T06:26:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ad80da658bbcaaac1d3617ea6cb0f4d5e16da422'/>
<id>ad80da658bbcaaac1d3617ea6cb0f4d5e16da422</id>
<content type='text'>
The RaidEngine is a new FSL hardware used for Raid5/6 acceration.
This patch enables the RaidEngine functionality and provides
hardware offloading capability for memcpy, xor and pq computation.
It works with async_tx.

Signed-off-by: Harninder Rai &lt;harninder.rai@freescale.com&gt;
Signed-off-by: Xuelin Shi &lt;xuelin.shi@freescale.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The RaidEngine is a new FSL hardware used for Raid5/6 acceration.
This patch enables the RaidEngine functionality and provides
hardware offloading capability for memcpy, xor and pq computation.
It works with async_tx.

Signed-off-by: Harninder Rai &lt;harninder.rai@freescale.com&gt;
Signed-off-by: Xuelin Shi &lt;xuelin.shi@freescale.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
</pre>
</div>
</content>
</entry>
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