linux.git/drivers/dma/dw, branch v4.13

dmaengine: DW DMAC: Handle return value of clk_prepare_enable

2017-05-24T04:25:17+00:00

clk_prepare_enable() can fail here and we must check its return value.

Signed-off-by: Arvind Yadav 
Acked-by: Viresh Kumar 
Acked-by: Andy Shevchenko 
Signed-off-by: Vinod Koul

dmaengine: dw: Remove AVR32 bits from the driver

2017-05-15T15:07:30+00:00

AVR32 is gone. Now it's time to clean up the driver by removing
leftovers that was used by AVR32 related code.

Signed-off-by: Andy Shevchenko 
Acked-by: Vinod Koul 
Signed-off-by: Takashi Iwai

Merge tag 'dmaengine-4.11-rc1' of git://git.infradead.org/users/vkoul/slave-dma

2017-02-22T01:06:22+00:00

Pull dmaengine updates from Vinod Koul:
 "This time we fairly boring and bit small update.

   - Support for Intel iDMA 32-bit hardware
   - deprecate broken support for channel switching in async_tx
   - bunch of updates on stm32-dma
   - Cyclic support for zx dma and making in generic zx dma driver
   - Small updates to bunch of other drivers"

* tag 'dmaengine-4.11-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (29 commits)
  async_tx: deprecate broken support for channel switching
  dmaengine: rcar-dmac: Widen DMA mask to 40 bits
  dmaengine: sun6i: allow build on ARM64 platforms (sun50i)
  dmaengine: Provide a wrapper for memcpy operations
  dmaengine: zx: fix build warning
  dmaengine: dw: we do support Merrifield SoC in PCI mode
  dmaengine: dw: add support of iDMA 32-bit hardware
  dmaengine: dw: introduce register mappings for iDMA 32-bit
  dmaengine: dw: introduce block2bytes() and bytes2block()
  dmaengine: dw: extract dwc_chan_pause() for future use
  dmaengine: dw: replace convert_burst() with one liner
  dmaengine: dw: register IRQ and DMA pool with instance ID
  dmaengine: dw: Fix data corruption in large device to memory transfers
  dmaengine: ste_dma40: indicate granularity on channels
  dmaengine: ste_dma40: indicate directions on channels
  dmaengine: stm32-dma: Add error messages if xlate fails
  dmaengine: dw: pci: remove LPE Audio DMA ID
  dmaengine: stm32-dma: Add max_burst support
  dmaengine: stm32-dma: Add synchronization support
  dmaengine: stm32-dma: Fix residue computation issue in cyclic mode
  ...

dmaengine: dw: we do support Merrifield SoC in PCI mode

2017-01-25T06:21:40+00:00

Intel Merrifield platform contains Intel integrated DMA (iDMA 32-bit) which has
a slightly different register mapping, e.g. some bits in CTL_* and CFG_*
channel registers, and has to use platform data since there is no
autoconfiguration.

The iDMA 32-bit specification is available in the publicly available
documentation for Intel Braswell and BayTrail SoCs as LPE Audio DMA.

Signed-off-by: Andy Shevchenko 
Signed-off-by: Vinod Koul

dmaengine: dw: add support of iDMA 32-bit hardware

2017-01-25T06:21:40+00:00

iDMA 32-bit is Intel designed DMA controller that behaves like Synopsys
Designware DMA. This patch adds a support of the new Intel hardware.

Due to iDMA 32-bit has no autoconfiguration the platform code must
provide a platform data to dw_dma_probe().

By default full FIFO (1024 bytes) is assigned to channel 0. Here we
slice FIFO on equal parts between channels for iDMA 32-bit case.

Signed-off-by: Andy Shevchenko 
Signed-off-by: Vinod Koul

dmaengine: dw: introduce register mappings for iDMA 32-bit

2017-01-25T06:21:40+00:00

The integrated DMA (iDMA 32-bit) is Intel designed DMA controller which
mimics Synopsys Designware DMA. This patch appends the register mappings
for the parts which are slightly different to the DesignWare hardware.

Signed-off-by: Andy Shevchenko 
Signed-off-by: Vinod Koul

dmaengine: dw: introduce block2bytes() and bytes2block()

2017-01-25T06:21:40+00:00

The newly introduced helpers prepare driver to support new DMA controller
hardware.

While here, introduce DWC_CTLH_BLOCK_TS() macro as well.

Signed-off-by: Andy Shevchenko 
Signed-off-by: Vinod Koul

dmaengine: dw: extract dwc_chan_pause() for future use

2017-01-25T06:21:39+00:00

iDMA 32-bit has a special handling of the FIFO during pause() /
terminate_all(). Prepare code to implement that.

Signed-off-by: Andy Shevchenko 
Signed-off-by: Vinod Koul

dmaengine: dw: replace convert_burst() with one liner

2017-01-25T06:21:39+00:00

Replace convert_burst() with one liner in place.

The change simplifies further extension of the driver to cover new DMA
controller hardware.

Signed-off-by: Andy Shevchenko 
Signed-off-by: Vinod Koul

dmaengine: dw: register IRQ and DMA pool with instance ID

2017-01-25T06:21:39+00:00

It is really useful not only for debugging to have an IRQ line and DMA
pool labeled with driver and its instance ID. Do this for DesignWare DMA
driver.

All current users of this IP would be enhanced later on.

Signed-off-by: Andy Shevchenko 
Signed-off-by: Vinod Koul