linux.git/drivers/dma/dw, branch v4.10

dmaengine: dw: fix typo in Kconfig

2017-01-02T02:43:00+00:00

platfroms -> platforms

Signed-off-by: Jean Delvare 
Fixes: fed42c198b45 ("dma: dw: add PCI part of the driver")
Cc: Viresh Kumar 
Acked-by: Andy Shevchenko 
Signed-off-by: Vinod Koul

dmaengine: DW DMAC: add multi-block property to device tree

2016-11-30T03:27:50+00:00

Several versions of DW DMAC have multi block transfers hardware
support. Hardware support of multi block transfers is disabled
by default if we use DT to configure DMAC and software emulation
of multi block transfers used instead.
Add multi-block property, so it is possible to enable hardware
multi block transfers (if present) via DT.

Switch from per device is_nollp variable to multi_block array
to be able enable/disable multi block transfers separately per
channel.

Acked-by: Andy Shevchenko 
Signed-off-by: Eugeniy Paltsev 
Signed-off-by: Vinod Koul

dmaengine: DW DMAC: enable memory-to-memory transfers support

2016-11-30T03:27:17+00:00

All known devices, which use DT for configuration, support
memory-to-memory transfers. So enable it by default, if we read
configuration from DT.

Acked-by: Andy Shevchenko 
Signed-off-by: Eugeniy Paltsev 
Signed-off-by: Vinod Koul

Merge tag 'dmaengine-4.9-rc1' of git://git.infradead.org/users/vkoul/slave-dma

2016-10-07T00:13:54+00:00

Pull dmaengine updates from Vinod Koul:
 "This is bit large pile of code which bring in some nice additions:

   - Error reporting: we have added a new mechanism for users of
     dmaenegine to register a callback_result which tells them the
     result of the dma transaction. Right now only one user (ntb) is
     using it.

   - As we discussed on KS mailing list and pointed out NO_IRQ has no
     place in kernel, this also remove NO_IRQ from dmaengine subsystem
     (both arm and ppc users)

   - Support for IOMMU slave transfers and its implementation for arm.

   - To get better build coverage, enable COMPILE_TEST for bunch of
     driver, and fix the warning and sparse complaints on these.

   - Apart from above, usual updates spread across drivers"

* tag 'dmaengine-4.9-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (169 commits)
  async_pq_val: fix DMA memory leak
  dmaengine: virt-dma: move function declarations
  dmaengine: omap-dma: Enable burst and data pack for SG
  DT: dmaengine: rcar-dmac: document R8A7743/5 support
  dmaengine: fsldma: Unmap region obtained by of_iomap
  dmaengine: jz4780: fix resource leaks on error exit return
  dma-debug: fix ia64 build, use PHYS_PFN
  dmaengine: coh901318: fix integer overflow when shifting more than 32 places
  dmaengine: edma: avoid uninitialized variable use
  dma-mapping: fix m32r build warning
  dma-mapping: fix ia64 build, use PHYS_PFN
  dmaengine: ti-dma-crossbar: enable COMPILE_TEST
  dmaengine: omap-dma: enable COMPILE_TEST
  dmaengine: edma: enable COMPILE_TEST
  dmaengine: ti-dma-crossbar: Fix of_device_id data parameter usage
  dmaengine: ti-dma-crossbar: Correct type for of_find_property() third parameter
  dmaengine/ARM: omap-dma: Fix the DMAengine compile test on non OMAP configs
  dmaengine: edma: Rename set_bits and remove unused clear_bits helper
  dmaengine: edma: Use correct type for of_find_property() third parameter
  dmaengine: edma: Fix of_device_id data parameter usage (legacy vs TPCC)
  ...

dmaengine: dw: override LLP support if asked in platform data

2016-08-31T14:13:29+00:00

There are at least two known devices, e.g. DMA controller found on ARC AXS101
SDP board, that have LLP register and no multi block transfer support at the
same time.

Override autodetection by user provided data.

Reported-by: Eugeniy Paltsev 
Reviewed-by: Eugeniy Paltsev 
Signed-off-by: Andy Shevchenko 
Tested-by: Bryan O'Donoghue 
Signed-off-by: Greg Kroah-Hartman

dmaengine: dw: set polarity of handshake interface

2016-08-31T14:13:29+00:00

Intel Quark UART uses DesignWare DMA IP. Though the DMA IP is connected in such
way that handshake interface uses inverted polarity. We have to provide a
possibility to set this in the DMA driver when configuring a channel.

Introduce a new member of custom slave configuration called 'hs_polarity' and
set active low polarity in case this value is 'true'.

Acked-by: Vinod Koul 
Signed-off-by: Andy Shevchenko 
Tested-by: Bryan O'Donoghue 
Signed-off-by: Greg Kroah-Hartman

dmaengine: dw: keep copy of custom slave config in dwc

2016-08-31T14:13:29+00:00

It seems we need to extend custom slave configuration by one more member to
support Intel Quart UART. It becomes a burden to manage all members of struct
dw_dma_slave one-by-one.

Replace the set of fields by embedding struct dw_dma_slave into struct
dw_dma_chan.

Acked-by: Vinod Koul 
Signed-off-by: Andy Shevchenko 
Tested-by: Bryan O'Donoghue 
Signed-off-by: Greg Kroah-Hartman

dmaengine: dw: convert callback to helper function

2016-08-08T02:41:38+00:00

This is in preperation of moving to a callback that provides results to the
callback for the transaction. The conversion will maintain current behavior
and the driver must convert to new callback mechanism at a later time in
order to receive results.

Signed-off-by: Dave Jiang 
Reviewed-by: Lars-Peter Clausen 
Cc: Viresh Kumar 
Signed-off-by: Vinod Koul

dmaengine: dw: pass platform data via struct dw_dma_chip

2016-05-02T10:01:05+00:00

We pass struct dw_dma_chip to dw_dma_probe() anyway, thus we may use it to
pass a platform data as well.

While here, constify the source of the platform data.

Acked-by: Viresh Kumar 
Signed-off-by: Andy Shevchenko 
Signed-off-by: Vinod Koul

dmaengine: dw: keep entire platform data in struct dw_dma

2016-05-02T10:01:05+00:00

Keep the entire platform data in the struct dw_dma.
It makes the driver a bit cleaner.

Acked-by: Viresh Kumar 
Signed-off-by: Andy Shevchenko 
Signed-off-by: Vinod Koul