linux.git/drivers/crypto/stm32, branch v6.5

crypto: stm32 - Use devm_platform_get_and_ioremap_resource()

2023-03-24T10:22:28+00:00

According to commit 890cc39a8799 ("drivers: provide
devm_platform_get_and_ioremap_resource()"), convert
platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.

Signed-off-by: Yang Li 
Signed-off-by: Herbert Xu

crypto: stm32 - Save and restore between each request

2023-03-17T03:16:44+00:00

The Crypto API hashing paradigm requires the hardware state to
be exported between *each* request because multiple unrelated
hashes may be processed concurrently.

The stm32 hardware is capable of producing the hardware hashing
state but it was only doing it in the export function.  This is
not only broken for export as you can't export a kernel pointer
and reimport it, but it also means that concurrent hashing was
fundamentally broken.

Fix this by moving the saving and restoring of hardware hash
state between each and every hashing request.

Fixes: 8a1012d3f2ab ("crypto: stm32 - Support for STM32 HASH module")
Reported-by: Li kunyu 
Signed-off-by: Herbert Xu 
Reviewed-by: Linus Walleij 
Tested-by: Linus Walleij 
Signed-off-by: Herbert Xu

crypto: stm32 - Fix empty message processing

2023-03-17T03:16:44+00:00

Change the emptymsg check in stm32_hash_copy_hash to rely on whether
we have any existing hash state, rather than whether this particular
update request is empty.

Also avoid computing the hash for empty messages as this could hang.

Signed-off-by: Herbert Xu 
Reviewed-by: Linus Walleij 
Tested-by: Linus Walleij 
Signed-off-by: Herbert Xu

crypto: stm32 - Remove unused HASH_FLAGS_ERRORS

2023-03-17T03:16:44+00:00

The bit HASH_FLAGS_ERRORS was never used.  Remove it.

Reviewed-by: Linus Walleij 
Tested-by: Linus Walleij 
Signed-off-by: Herbert Xu

crypto: stm32 - Move hash state into separate structure

2023-03-17T03:16:44+00:00

Create a new struct stm32_hash_state so that it may be exported
in future instead of the entire request context.

Reviewed-by: Linus Walleij 
Tested-by: Linus Walleij 
Signed-off-by: Herbert Xu

crypto: stm32 - Remove unused hdev->err field

2023-03-17T03:16:44+00:00

The variable hdev->err is never read so it can be removed.

Also remove a spurious inclusion of linux/crypto.h.

Reviewed-by: Linus Walleij 
Tested-by: Linus Walleij 
Signed-off-by: Herbert Xu

crypto: stm32 - Simplify finup

2023-03-17T03:16:44+00:00

The current finup code is unnecessarily convoluted.  There is no
need to call update and final separately as update already does
all the necessary work on its own.

Simplify this by utilising the HASH_FLAGS_FINUP bit in rctx to
indicate only finup and use the HASH_FLAGS_FINAL bit instead to
signify processing common to both final and finup.

Reviewed-by: Linus Walleij 
Tested-by: Linus Walleij 
Signed-off-by: Herbert Xu

crypto: stm32 - Move polling into do_one_request

2023-03-17T03:16:44+00:00

There is no need to poll separate for update and final.  We could
merge them into do_one_request.

Also fix the error handling so that we don't poll (and overwrite
the error) when an error has already occurred.

Reviewed-by: Linus Walleij 
Tested-by: Linus Walleij 
Signed-off-by: Herbert Xu

crypto: stm32 - Save 54 CSR registers

2023-03-17T03:16:44+00:00

The CSR registers go from 0 to 53.  So the number of registers
should be 54.

Reviewed-by: Linus Walleij 
Tested-by: Linus Walleij 
Signed-off-by: Herbert Xu

crypto: stm32/hash - Support Ux500 hash

2023-02-03T04:54:55+00:00

The Ux500 has a hash block which is an ancestor to the STM32
hash block. With some minor code path additions we can
support also this variant in the STM32 driver. Differences:

- Ux500 only supports SHA1 and SHA256 (+/- MAC) so we split
  up the algorithm registration per-algorithm and register
  each algorithm along with its MAC variant separately.

- Ux500 does not have an interrupt to indicate that hash
  calculation is complete, so we add code paths to handle
  polling for completion if the interrupt is missing in the
  device tree.

- Ux500 is lacking the SR status register, to check if an
  operating is complete, we need to poll the HASH_STR_DCAL
  bit in the HASH_STR register instead.

- Ux500 had the resulting hash at address offset 0x0c and
  8 32bit registers ahead. We account for this with a special
  code path when reading out the hash digest.

- Ux500 need a special bit set in the control register before
  performing the final hash calculation on an empty message.

- Ux500 hashes on empty messages will be performed if the
  above bit is set, but are incorrect. For this reason we
  just make an inline synchronous hash using a fallback
  hash.

Tested on the Ux500 Golden device with the extended tests.

Acked-by: Lionel Debieve 
Signed-off-by: Linus Walleij 
Signed-off-by: Herbert Xu