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<title>linux.git/drivers/crypto/stm32, branch v4.14</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>crypto: stm32 - Try to fix hash padding</title>
<updated>2017-10-07T04:04:31+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2017-09-12T09:35:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=532f419cde077ffe9616c97902af177fbb868b17'/>
<id>532f419cde077ffe9616c97902af177fbb868b17</id>
<content type='text'>
gcc warns that the length for the extra unaligned data in the hash
function may be used unaligned. In theory this could happen if
we pass a zero-length sg_list, or if sg_is_last() was never true:

In file included from drivers/crypto/stm32/stm32-hash.c:23:
drivers/crypto/stm32/stm32-hash.c: In function 'stm32_hash_one_request':
include/uapi/linux/kernel.h:12:49: error: 'ncp' may be used uninitialized in this function [-Werror=maybe-uninitialized]
 #define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))

Neither of these can happen in practice, so the warning is harmless.

However while trying to suppress the warning, I noticed multiple
problems with that code:

- On big-endian kernels, we byte-swap the data like we do for
  register accesses, however this is a data stream and almost
  certainly needs to use a single writesl() instead of series
  of writel() to give the correct hash.

- If the length is not a multiple of four bytes, we skip the
  last word entirely, since we write the truncated length
  using stm32_hash_set_nblw().

- If we change the code to round the length up rather than
  down, the last bytes contain stale data, so it needs some
  form of padding.

This tries to address all four problems, by correctly
initializing the length to zero, using endian-safe copy
functions, adding zero-padding and passing the padded length.

I have done no testing on this patch, so please review
carefully and if possible test with an unaligned length
and big-endian kernel builds.

Fixes: 8a1012d3f2ab ("crypto: stm32 - Support for STM32 HASH module")
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
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<pre>
gcc warns that the length for the extra unaligned data in the hash
function may be used unaligned. In theory this could happen if
we pass a zero-length sg_list, or if sg_is_last() was never true:

In file included from drivers/crypto/stm32/stm32-hash.c:23:
drivers/crypto/stm32/stm32-hash.c: In function 'stm32_hash_one_request':
include/uapi/linux/kernel.h:12:49: error: 'ncp' may be used uninitialized in this function [-Werror=maybe-uninitialized]
 #define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))

Neither of these can happen in practice, so the warning is harmless.

However while trying to suppress the warning, I noticed multiple
problems with that code:

- On big-endian kernels, we byte-swap the data like we do for
  register accesses, however this is a data stream and almost
  certainly needs to use a single writesl() instead of series
  of writel() to give the correct hash.

- If the length is not a multiple of four bytes, we skip the
  last word entirely, since we write the truncated length
  using stm32_hash_set_nblw().

- If we change the code to round the length up rather than
  down, the last bytes contain stale data, so it needs some
  form of padding.

This tries to address all four problems, by correctly
initializing the length to zero, using endian-safe copy
functions, adding zero-padding and passing the padded length.

I have done no testing on this patch, so please review
carefully and if possible test with an unaligned length
and big-endian kernel builds.

Fixes: 8a1012d3f2ab ("crypto: stm32 - Support for STM32 HASH module")
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: stm32 - Support for STM32 HASH module</title>
<updated>2017-07-28T09:55:59+00:00</updated>
<author>
<name>lionel.debieve@st.com</name>
<email>lionel.debieve@st.com</email>
</author>
<published>2017-07-13T13:32:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8a1012d3f2abcef43470f879dbfd72651818e059'/>
<id>8a1012d3f2abcef43470f879dbfd72651818e059</id>
<content type='text'>
This module register a HASH module that support multiples
algorithms: MD5, SHA1, SHA224, SHA256.

It includes the support of HMAC hardware processing corresponding
to the supported algorithms. DMA or IRQ mode are used depending
on data length.

Signed-off-by: Lionel Debieve &lt;lionel.debieve@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
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<pre>
This module register a HASH module that support multiples
algorithms: MD5, SHA1, SHA224, SHA256.

It includes the support of HMAC hardware processing corresponding
to the supported algorithms. DMA or IRQ mode are used depending
on data length.

Signed-off-by: Lionel Debieve &lt;lionel.debieve@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: stm32 - Rename module to use generic crypto</title>
<updated>2017-07-28T09:55:54+00:00</updated>
<author>
<name>lionel.debieve@st.com</name>
<email>lionel.debieve@st.com</email>
</author>
<published>2017-07-13T13:06:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c35af01d939a865b666591ddc653d082258a1135'/>
<id>c35af01d939a865b666591ddc653d082258a1135</id>
<content type='text'>
The complete stm32 module is rename as crypto
in order to use generic naming

Signed-off-by: Lionel Debieve &lt;lionel.debieve@st.com&gt;
Reviewed-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The complete stm32 module is rename as crypto
in order to use generic naming

Signed-off-by: Lionel Debieve &lt;lionel.debieve@st.com&gt;
Reviewed-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: stm32 - solve crc issue during unbind</title>
<updated>2017-07-28T09:55:53+00:00</updated>
<author>
<name>lionel.debieve@st.com</name>
<email>lionel.debieve@st.com</email>
</author>
<published>2017-07-13T13:06:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0373d085870ab036146002d1ba3128855e26c953'/>
<id>0373d085870ab036146002d1ba3128855e26c953</id>
<content type='text'>
Use the correct unregister_shashes function to
to remove the registered algo

Signed-off-by: Lionel Debieve &lt;lionel.debieve@st.com&gt;
Reviewed-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use the correct unregister_shashes function to
to remove the registered algo

Signed-off-by: Lionel Debieve &lt;lionel.debieve@st.com&gt;
Reviewed-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: stm32 - CRC use relaxed function</title>
<updated>2017-07-28T09:55:51+00:00</updated>
<author>
<name>lionel.debieve@st.com</name>
<email>lionel.debieve@st.com</email>
</author>
<published>2017-07-13T13:06:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=391775191f38f807efebc1c3e58c79785d8dd526'/>
<id>391775191f38f807efebc1c3e58c79785d8dd526</id>
<content type='text'>
In case of arm soc support, readl and writel will
be optimized using relaxed functions

Signed-off-by: Lionel Debieve &lt;lionel.debieve@st.com&gt;
Reviewed-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In case of arm soc support, readl and writel will
be optimized using relaxed functions

Signed-off-by: Lionel Debieve &lt;lionel.debieve@st.com&gt;
Reviewed-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: stm32 - Fix OF module alias information</title>
<updated>2017-04-29T17:45:21+00:00</updated>
<author>
<name>Wei Yongjun</name>
<email>weiyongjun1@huawei.com</email>
</author>
<published>2017-04-25T14:35:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=929562b144783b9212625305eadcbbd800809643'/>
<id>929562b144783b9212625305eadcbbd800809643</id>
<content type='text'>
The module alias information passed to MODULE_DEVICE_TABLE()
should use stm32_dt_ids instead of undefined sti_dt_ids.

Fixes: b51dbe90912a ("crypto: stm32 - Support for STM32 CRC32 crypto module")
Signed-off-by: Wei Yongjun &lt;weiyongjun1@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
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<pre>
The module alias information passed to MODULE_DEVICE_TABLE()
should use stm32_dt_ids instead of undefined sti_dt_ids.

Fixes: b51dbe90912a ("crypto: stm32 - Support for STM32 CRC32 crypto module")
Signed-off-by: Wei Yongjun &lt;weiyongjun1@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: stm32 - Support for STM32 CRC32 crypto module</title>
<updated>2017-04-05T13:58:33+00:00</updated>
<author>
<name>Fabien DESSENNE</name>
<email>fabien.dessenne@st.com</email>
</author>
<published>2017-03-21T15:13:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b51dbe90912a0ce0c78717d2a8374af80b18ed11'/>
<id>b51dbe90912a0ce0c78717d2a8374af80b18ed11</id>
<content type='text'>
This module registers a CRC32 ("Ethernet") and a CRC32C (Castagnoli)
algorithm that make use of the STMicroelectronics STM32 crypto hardware.

Theses algorithms are compatible with the little-endian generic ones.
Both algorithms use ~0 as default seed (key).
With CRC32C the output is xored with ~0.

Using TCRYPT CRC32C speed test, this shows up to 900% speedup compared
to the crc32c-generic algorithm.

Signed-off-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This module registers a CRC32 ("Ethernet") and a CRC32C (Castagnoli)
algorithm that make use of the STMicroelectronics STM32 crypto hardware.

Theses algorithms are compatible with the little-endian generic ones.
Both algorithms use ~0 as default seed (key).
With CRC32C the output is xored with ~0.

Using TCRYPT CRC32C speed test, this shows up to 900% speedup compared
to the crc32c-generic algorithm.

Signed-off-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
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