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<title>linux.git/drivers/crypto/bcm/cipher.h, branch v4.16</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>crypto: bcm - Use GCM IV size constant</title>
<updated>2017-09-22T09:43:12+00:00</updated>
<author>
<name>Corentin LABBE</name>
<email>clabbe.montjoie@gmail.com</email>
</author>
<published>2017-08-22T08:08:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a59851d2f220e6653f8878bc312ad61f108fd3c9'/>
<id>a59851d2f220e6653f8878bc312ad61f108fd3c9</id>
<content type='text'>
This patch replace GCM IV size value by their constant name.

Signed-off-by: Corentin Labbe &lt;clabbe.montjoie@gmail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
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<pre>
This patch replace GCM IV size value by their constant name.

Signed-off-by: Corentin Labbe &lt;clabbe.montjoie@gmail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: brcm - Support more FlexRM rings than SPU engines.</title>
<updated>2017-08-03T05:52:43+00:00</updated>
<author>
<name>raveendra padasalagi</name>
<email>raveendra.padasalagi@broadcom.com</email>
</author>
<published>2017-07-21T05:47:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9166c44358346c0a92b11fd4e24925efff791648'/>
<id>9166c44358346c0a92b11fd4e24925efff791648</id>
<content type='text'>
Enhance code to generically support cases where DMA rings
are greater than or equal to number of SPU engines.
New hardware has underlying DMA engine-FlexRM with 32 rings
which can be used to communicate to any of the available
10 SPU engines.

Signed-off-by: Raveendra Padasalagi &lt;raveendra.padasalagi@broadcom.com&gt;
Reviewed-by: Scott Branden &lt;scott.branden@broadcom.com&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enhance code to generically support cases where DMA rings
are greater than or equal to number of SPU engines.
New hardware has underlying DMA engine-FlexRM with 32 rings
which can be used to communicate to any of the available
10 SPU engines.

Signed-off-by: Raveendra Padasalagi &lt;raveendra.padasalagi@broadcom.com&gt;
Reviewed-by: Scott Branden &lt;scott.branden@broadcom.com&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: brcm - Add Broadcom SPU driver</title>
<updated>2017-02-11T09:55:20+00:00</updated>
<author>
<name>Rob Rice</name>
<email>rob.rice@broadcom.com</email>
</author>
<published>2017-02-03T17:55:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9d12ba86f818aa9cfe9f01b750336aa441f2ffa2'/>
<id>9d12ba86f818aa9cfe9f01b750336aa441f2ffa2</id>
<content type='text'>
Add Broadcom Secure Processing Unit (SPU) crypto driver for SPU
hardware crypto offload. The driver supports ablkcipher, ahash,
and aead symmetric crypto operations.

Signed-off-by: Steve Lin &lt;steven.lin1@broadcom.com&gt;
Signed-off-by: Rob Rice &lt;rob.rice@broadcom.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add Broadcom Secure Processing Unit (SPU) crypto driver for SPU
hardware crypto offload. The driver supports ablkcipher, ahash,
and aead symmetric crypto operations.

Signed-off-by: Steve Lin &lt;steven.lin1@broadcom.com&gt;
Signed-off-by: Rob Rice &lt;rob.rice@broadcom.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
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</content>
</entry>
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