linux.git/drivers/crypto/Kconfig, branch v3.14 Linux kernel source tree crypto: mxs - Add Freescale MXS DCP driver 2014-01-05T12:49:54+00:00 Marek Vasut marex@denx.de 2013-12-10T19:26:21+00:00 15b59e7c3733f90ff1f7dd66ad77ae1c90bcdff5 Add support for the MXS DCP block. The driver currently supports SHA-1/SHA-256 hashing and AES-128 CBC/ECB modes. The non-standard CRC32 is not yet supported. Signed-off-by: Marek Vasut <marex@denx.de> Cc: David S. Miller <davem@davemloft.net> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: devicetree@vger.kernel.org Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Add support for the MXS DCP block. The driver currently supports
SHA-1/SHA-256 hashing and AES-128 CBC/ECB modes. The non-standard
CRC32 is not yet supported.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: David S. Miller <davem@davemloft.net>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: mxs - Remove the old DCP driver 2014-01-05T12:49:52+00:00 Marek Vasut marex@denx.de 2013-12-10T19:26:20+00:00 c493c04403769d833864ad5be2ff64dee7567ca7 Remove the old DCP driver as it had multiple severe issues. The driver will be replaced by a more robust implementation. Here is a short list of problems with this driver: 1) It only supports AES_CBC 2) The driver was apparently never ran behind anyone working with MXS. ie.: -> Restarting the DCP block is not done via mxs_reset_block() -> The DT name is not "fsl,dcp" or "fsl,mxs-dcp" as other MXS drivers 3) Introduces new ad-hoc IOCTLs 4) The IRQ handler can't use usual completion() in the driver because that'd trigger "scheduling while atomic" oops, yes? Signed-off-by: Marek Vasut <marex@denx.de> Cc: David S. Miller <davem@davemloft.net> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Remove the old DCP driver as it had multiple severe issues. The driver
will be replaced by a more robust implementation. Here is a short list
of problems with this driver:

1) It only supports AES_CBC
2) The driver was apparently never ran behind anyone working with MXS. ie.:
   -> Restarting the DCP block is not done via mxs_reset_block()
   -> The DT name is not "fsl,dcp" or "fsl,mxs-dcp" as other MXS drivers
3) Introduces new ad-hoc IOCTLs
4) The IRQ handler can't use usual completion() in the driver because that'd
   trigger "scheduling while atomic" oops, yes?

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: David S. Miller <davem@davemloft.net>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccp - CCP Kconfig fixes 2013-12-20T12:06:20+00:00 Tom Lendacky thomas.lendacky@amd.com 2013-12-10T16:38:39+00:00 d5aa80952aba9071b50a74c8daf7feb1caa2fd8c Update the Kconfig to include PCI on the 'depends on' and add 'select HW_RANDOM' to insure the necessary PCI and HW_RANDOM functions are available/included in the build. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Update the Kconfig to include PCI on the 'depends on'
and add 'select HW_RANDOM' to insure the necessary PCI
and HW_RANDOM functions are available/included in the
build.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crytpo: ccp - CCP device driver build files 2013-12-05T13:28:40+00:00 Tom Lendacky thomas.lendacky@amd.com 2013-11-12T17:46:51+00:00 f114766088f352a47f57307ff927b815e0239644 These files provide the ability to configure and build the AMD CCP device driver and crypto API support. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
These files provide the ability to configure and build the
AMD CCP device driver and crypto API support.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: omap-aes - Kconfig: Add build support for AM437x 2013-08-21T11:28:06+00:00 Joel Fernandes joelf@ti.com 2013-08-18T02:42:35+00:00 1bbf643705c3f85f3fa2325807afae260f755f9a For AM437x SoC, ARCH_OMAP2 and ARCH_OMAP3 is not enabled in the defconfig. We follow same thing as SHA driver, and add depends on ARCH_OMAP2PLUS so that the config is selectable for AES driver on AM437x SoC builds. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
For AM437x SoC, ARCH_OMAP2 and ARCH_OMAP3 is not enabled in the defconfig. We
follow same thing as SHA driver, and add depends on ARCH_OMAP2PLUS so that the
config is selectable for AES driver on AM437x SoC builds.

Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: omap-sham - Add SHA384 and SHA512 Support 2013-08-01T00:54:00+00:00 Lokesh Vutla lokeshvutla@ti.com 2013-07-26T06:59:14+00:00 eaef7e3f3f82923ea175ce4859908bb0d70072f3 Adding support for SHA348 and SHA512 in addition to MD5, SHA1, SHA224 SHA256 that the omap sha module supports. In order to add the support - Removed hard coded register offsets and passing offsets from pdata - Updating Flag offsets so that they can be used for SHA256 and SHA512 - Adding the algo info. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Adding support for SHA348 and SHA512 in addition to MD5, SHA1, SHA224
SHA256 that the omap sha module supports.

In order to add the support
- Removed hard coded register offsets and passing offsets from pdata
- Updating Flag offsets so that they can be used for SHA256 and SHA512
- Adding the algo info.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: dcp - Added support for Freescale's DCP co-processor 2013-05-28T07:43:03+00:00 Tobias Rauter tobiasrauter@gmail.com 2013-05-19T19:59:38+00:00 519d8b1a9d81be7e4ffad8aa6b0e3ea03984bb86 This patch enables the DCP crypto functionality on imx28. Currently, only aes-128-cbc is supported. Moreover, the dcpboot misc-device, which is used by Freescale's SDK tools and uses a non-software-readable OTP-key, is added. Changes of v2: - ring buffer for hardware-descriptors - use of ablkcipher walk - OTP key encryption/decryption via misc-device (compatible to Freescale-SDK) - overall cleanup The DCP is also capable of sha1/sha256 but I won't be able to add that anytime soon. Tested with built-in runtime-self-test, tcrypt and openssl via cryptodev 1.6 on imx28-evk and a custom built imx28-board. Signed-off-by: Tobias Rauter <tobias.rauter@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
This patch enables the DCP crypto functionality on imx28.
Currently, only aes-128-cbc is supported.
Moreover, the dcpboot misc-device, which is used by Freescale's
SDK tools and uses a non-software-readable OTP-key, is added.

Changes of v2:
- ring buffer for hardware-descriptors
- use of ablkcipher walk
- OTP key encryption/decryption via misc-device
  (compatible to Freescale-SDK)
- overall cleanup

The DCP is also capable of sha1/sha256 but I won't be able to add
that anytime soon.
Tested with built-in runtime-self-test, tcrypt and openssl via
cryptodev 1.6 on imx28-evk and a custom built imx28-board.

Signed-off-by: Tobias Rauter <tobias.rauter@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: sahara - remove dependency on EXPERIMENTAL 2013-05-24T09:55:30+00:00 Paul Bolle pebolle@tiscali.nl 2013-05-12T11:57:19+00:00 74d24d838be0ee64c1085558238e5c51e1659817 The Kconfig symbol EXPERIMENTAL was removed in v3.9. So this dependency makes it impossible to set CRYPTO_DEV_SAHARA. It's unlikely that this is what is intended, so let's remove this dependency. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
The Kconfig symbol EXPERIMENTAL was removed in v3.9. So this dependency
makes it impossible to set CRYPTO_DEV_SAHARA. It's unlikely that this is
what is intended, so let's remove this dependency.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: sahara - Add driver for SAHARA2 accelerator. 2013-03-21T09:44:41+00:00 Javier Martin javier.martin@vista-silicon.com 2013-03-01T11:37:53+00:00 5de8875281e1db024d67cbd5c792264194bfca2a SAHARA2 HW module is included in the i.MX27 SoC from Freescale. It is capable of performing cipher algorithms such as AES, 3DES..., hashing and RNG too. This driver provides support for AES-CBC and AES-ECB by now. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
SAHARA2 HW module is included in the i.MX27 SoC from
Freescale. It is capable of performing cipher algorithms
such as AES, 3DES..., hashing and RNG too.

This driver provides support for AES-CBC and AES-ECB
by now.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: atmel-sha - add support for latest release of the IP (0x410) 2013-03-10T08:46:42+00:00 Nicolas Royer nicolas@eukrea.com 2013-02-20T16:10:26+00:00 d4905b38d1f6b60761a6fd16f45ebd1fac8b6e1f Updates from IP release 0x320 to 0x400: - add DMA support (previous IP revision use PDC) - add DMA double input buffer support - add SHA224 support Update from IP release 0x400 to 0x410: - add SHA384 and SHA512 support Signed-off-by: Nicolas Royer <nicolas@eukrea.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Eric Bénard <eric@eukrea.com> Tested-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Updates from IP release 0x320 to 0x400:
 - add DMA support (previous IP revision use PDC)
 - add DMA double input buffer support
 - add SHA224 support

Update from IP release 0x400 to 0x410:
 - add SHA384 and SHA512 support

Signed-off-by: Nicolas Royer <nicolas@eukrea.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Eric Bénard <eric@eukrea.com>
Tested-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>