linux.git/drivers/clk, branch v4.3-rc6

Partially revert "clk: mvebu: Convert to clk_hw based provider APIs"

2015-10-14T18:28:17+00:00

This partially reverts commit eca61c9ff2588e1df373e61078e1874976315839.

Thomas reports that it causes regressions on Armada XP devices.
This is because of_clk_get_parent_name() relies on the property
'clock-output-names' to resolve the name of a clock's parent,
without trying to get the clock from the framework and call
__clk_get_name(). Given that Armada XP devices don't have the
'clock-output-names' property, of_clk_get_parent_name() returns
the name of the node which doesn't match the actual parent
clock's name at all, causing CPU clocks to never link up with
their parents.

Reported-by: Thomas Petazzoni 
Signed-off-by: Stephen Boyd

Merge branch 'for-4.3-rc/ti-clk-fixes' of https://github.com/t-kristo/linux-pm into clk-fixes

2015-10-02T18:22:23+00:00

Pull fixes from Tero Kristo:

"A few TI clock driver fixes to pull against 4.3-rc"

* 'for-4.3-rc/ti-clk-fixes' of https://github.com/t-kristo/linux-pm: (3 commits)
  clk: ti: dflt: fix enable_reg validity check
  clk: ti: fix dual-registration of uart4_ick
  clk: ti: clk-7xx: Remove hardwired ABE clock configuration

clk: ti: dflt: fix enable_reg validity check

2015-10-02T06:24:28+00:00

The default clock enabling functions for TI clocks -
omap2_dflt_clk_enable() and omap2_dflt_clk_disable() perform a
NULL check for the enable_reg field of the clk_hw_omap structure.
This enable_reg field however is merely a combination of the index
of the master IP module, and the offset from the master IP module's
base address. A value of 0 is perfectly valid, and the current error
checking will fail in these cases. The issue was found when trying
to enable the iva2_ck clock on OMAP3 platforms.

So, switch the check to use IS_ERR. This correction is similar to the
logic used in commit c807dbedb5e5 ("clk: ti: fix ti_clk_get_reg_addr
error handling").

Fixes: 9f37e90efaf0 ("clk: ti: dflt: move support for default gate clock..")
Signed-off-by: Suman Anna 
Signed-off-by: Tero Kristo

clk: ti: fix dual-registration of uart4_ick

2015-10-02T06:24:28+00:00

On the OMAP AM3517 platform the uart4_ick gets registered
twice, causing any power management to /dev/ttyO3 to fail
when trying to wake the device up.

This solves the following oops:

[] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa09e008
[] PC is at serial_omap_pm+0x48/0x15c
[] LR is at _raw_spin_unlock_irqrestore+0x30/0x5c

Fixes: aafd900cab87 ("CLK: TI: add omap3 clock init file")
Cc: stable@vger.kernel.org
Cc: mturquette@baylibre.com
Cc: sboyd@codeaurora.org
Cc: linux-clk@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: linux-kernel@lists.codethink.co.uk
Signed-off-by: Ben Dooks 
Signed-off-by: Tero Kristo

clk: ti: clk-7xx: Remove hardwired ABE clock configuration

2015-10-02T06:24:28+00:00

The ABE related clocks should be configured via DT and not have it wired
inside of the kernel.

Fixes: a74c52def9ab ("clk: ti: clk-7xx: Correct ABE DPLL configuration")
Signed-off-by: Peter Ujfalusi 
Signed-off-by: Tero Kristo

clk: samsung: fix cpu clock's flags checking

2015-09-22T16:53:51+00:00

CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
incorrectly used as a bit numbers.  Fix it.

Tested on Exynos4210 based Origen board and on Exynos5250 based
Arndale board.

Cc: Tomasz Figa 
Cc: Michael Turquette 
Cc: Thomas Abraham 
Fixes: ddeac8d96 ("clk: samsung: add infrastructure to register cpu clocks")
Reported-by: Dan Carpenter 
Reviewed-by: Krzysztof Kozlowski 
Reviewed-by: Javier Martinez Canillas 
Acked-by: Sylwester Nawrocki 
Signed-off-by: Bartlomiej Zolnierkiewicz 
Signed-off-by: Stephen Boyd

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2015-09-20T03:17:40+00:00

Pull clk fixes from Stephen Boyd:
 "A few driver fixes for tegra, rockchip, and st SoCs and a two-liner in
  the framework to avoid oops when get_parent ops return out of range
  values on tegra platforms"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x
  clk: check for invalid parent index of orphans in __clk_init()
  clk: tegra: dfll: Properly protect OPP list
  clk: rockchip: add critical clock for rk3368

drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x

2015-09-17T18:51:43+00:00

Use a generic name for this kind of PLL

Correction in dts files are already done here:
commit 5eb26c605909 ("ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x")

Signed-off-by: Gabriel Fernandez 
Signed-off-by: Stephen Boyd

clk: check for invalid parent index of orphans in __clk_init()

2015-09-16T22:35:18+00:00

If a mux clock is initialised (by hardware or firmware) with an
invalid parent, its ->get_parent() can return an out of range
index.  For example, the generic mux clock attempts to return
-EINVAL, which due to the u8 return type ends up a rather large
number.  Using this index with the parent_names[] array results
in an invalid pointer and (usually) a crash in the following
strcmp().

This patch adds a check for the parent index being in range,
ignoring clocks reporting invalid values.

Signed-off-by: Mans Rullgard 
Tested-by: Rhyland Klein 
Signed-off-by: Stephen Boyd

clk: tegra: dfll: Properly protect OPP list

2015-09-16T22:16:03+00:00

The OPP list needs to be protected against concurrent accesses. Using
simple RCU read locks does the trick and gets rid of the following
lockdep warning:

	===============================
	[ INFO: suspicious RCU usage. ]
	4.2.0-next-20150908 #1 Not tainted
	-------------------------------
	drivers/base/power/opp.c:460 Missing rcu_read_lock() or dev_opp_list_lock protection!

	other info that might help us debug this:

	rcu_scheduler_active = 1, debug_locks = 0
	4 locks held by kworker/u8:0/6:
	 #0:  ("%s""deferwq"){++++.+}, at: [] process_one_work+0x118/0x4bc
	 #1:  (deferred_probe_work){+.+.+.}, at: [] process_one_work+0x118/0x4bc
	 #2:  (&dev->mutex){......}, at: [] __device_attach+0x20/0x118
	 #3:  (prepare_lock){+.+...}, at: [] clk_prepare_lock+0x10/0xf8

	stack backtrace:
	CPU: 2 PID: 6 Comm: kworker/u8:0 Not tainted 4.2.0-next-20150908 #1
	Hardware name: NVIDIA Tegra SoC (Flattened Device Tree)
	Workqueue: deferwq deferred_probe_work_func
	[] (unwind_backtrace) from [] (show_stack+0x10/0x14)
	[] (show_stack) from [] (dump_stack+0x94/0xd4)
	[] (dump_stack) from [] (dev_pm_opp_find_freq_ceil+0x108/0x114)
	[] (dev_pm_opp_find_freq_ceil) from [] (dfll_calculate_rate_request+0xb8/0x170)
	[] (dfll_calculate_rate_request) from [] (dfll_clk_round_rate+0x1c/0x2c)
	[] (dfll_clk_round_rate) from [] (clk_calc_new_rates+0x1b8/0x228)
	[] (clk_calc_new_rates) from [] (clk_core_set_rate_nolock+0x44/0xac)
	[] (clk_core_set_rate_nolock) from [] (clk_set_rate+0x24/0x34)
	[] (clk_set_rate) from [] (tegra124_cpufreq_probe+0x120/0x230)
	[] (tegra124_cpufreq_probe) from [] (platform_drv_probe+0x44/0xac)
	[] (platform_drv_probe) from [] (driver_probe_device+0x218/0x304)
	[] (driver_probe_device) from [] (bus_for_each_drv+0x60/0x94)
	[] (bus_for_each_drv) from [] (__device_attach+0xb4/0x118)
	ata1: SATA link down (SStatus 0 SControl 300)
	[] (__device_attach) from [] (bus_probe_device+0x88/0x90)
	[] (bus_probe_device) from [] (deferred_probe_work_func+0x58/0x8c)
	[] (deferred_probe_work_func) from [] (process_one_work+0x188/0x4bc)
	[] (process_one_work) from [] (worker_thread+0x4c/0x4f4)
	[] (worker_thread) from [] (kthread+0xe4/0xf8)
	[] (kthread) from [] (ret_from_fork+0x14/0x24)

Signed-off-by: Thierry Reding 
Fixes: c4fe70ada40f ("clk: tegra: Add closed loop support for the DFLL")
[vince.h@nvidia.com: Unlock rcu on error path]
Signed-off-by: Vince Hsu 
[sboyd@codeaurora.org: Dropped second hunk that nested the rcu
read lock unnecessarily]
Signed-off-by: Stephen Boyd