linux.git/drivers/clk, branch v4.3-rc2

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2015-09-20T03:17:40+00:00

Pull clk fixes from Stephen Boyd:
 "A few driver fixes for tegra, rockchip, and st SoCs and a two-liner in
  the framework to avoid oops when get_parent ops return out of range
  values on tegra platforms"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x
  clk: check for invalid parent index of orphans in __clk_init()
  clk: tegra: dfll: Properly protect OPP list
  clk: rockchip: add critical clock for rk3368

drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x

2015-09-17T18:51:43+00:00

Use a generic name for this kind of PLL

Correction in dts files are already done here:
commit 5eb26c605909 ("ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x")

Signed-off-by: Gabriel Fernandez 
Signed-off-by: Stephen Boyd

clk: check for invalid parent index of orphans in __clk_init()

2015-09-16T22:35:18+00:00

If a mux clock is initialised (by hardware or firmware) with an
invalid parent, its ->get_parent() can return an out of range
index.  For example, the generic mux clock attempts to return
-EINVAL, which due to the u8 return type ends up a rather large
number.  Using this index with the parent_names[] array results
in an invalid pointer and (usually) a crash in the following
strcmp().

This patch adds a check for the parent index being in range,
ignoring clocks reporting invalid values.

Signed-off-by: Mans Rullgard 
Tested-by: Rhyland Klein 
Signed-off-by: Stephen Boyd

clk: tegra: dfll: Properly protect OPP list

2015-09-16T22:16:03+00:00

The OPP list needs to be protected against concurrent accesses. Using
simple RCU read locks does the trick and gets rid of the following
lockdep warning:

	===============================
	[ INFO: suspicious RCU usage. ]
	4.2.0-next-20150908 #1 Not tainted
	-------------------------------
	drivers/base/power/opp.c:460 Missing rcu_read_lock() or dev_opp_list_lock protection!

	other info that might help us debug this:

	rcu_scheduler_active = 1, debug_locks = 0
	4 locks held by kworker/u8:0/6:
	 #0:  ("%s""deferwq"){++++.+}, at: [] process_one_work+0x118/0x4bc
	 #1:  (deferred_probe_work){+.+.+.}, at: [] process_one_work+0x118/0x4bc
	 #2:  (&dev->mutex){......}, at: [] __device_attach+0x20/0x118
	 #3:  (prepare_lock){+.+...}, at: [] clk_prepare_lock+0x10/0xf8

	stack backtrace:
	CPU: 2 PID: 6 Comm: kworker/u8:0 Not tainted 4.2.0-next-20150908 #1
	Hardware name: NVIDIA Tegra SoC (Flattened Device Tree)
	Workqueue: deferwq deferred_probe_work_func
	[] (unwind_backtrace) from [] (show_stack+0x10/0x14)
	[] (show_stack) from [] (dump_stack+0x94/0xd4)
	[] (dump_stack) from [] (dev_pm_opp_find_freq_ceil+0x108/0x114)
	[] (dev_pm_opp_find_freq_ceil) from [] (dfll_calculate_rate_request+0xb8/0x170)
	[] (dfll_calculate_rate_request) from [] (dfll_clk_round_rate+0x1c/0x2c)
	[] (dfll_clk_round_rate) from [] (clk_calc_new_rates+0x1b8/0x228)
	[] (clk_calc_new_rates) from [] (clk_core_set_rate_nolock+0x44/0xac)
	[] (clk_core_set_rate_nolock) from [] (clk_set_rate+0x24/0x34)
	[] (clk_set_rate) from [] (tegra124_cpufreq_probe+0x120/0x230)
	[] (tegra124_cpufreq_probe) from [] (platform_drv_probe+0x44/0xac)
	[] (platform_drv_probe) from [] (driver_probe_device+0x218/0x304)
	[] (driver_probe_device) from [] (bus_for_each_drv+0x60/0x94)
	[] (bus_for_each_drv) from [] (__device_attach+0xb4/0x118)
	ata1: SATA link down (SStatus 0 SControl 300)
	[] (__device_attach) from [] (bus_probe_device+0x88/0x90)
	[] (bus_probe_device) from [] (deferred_probe_work_func+0x58/0x8c)
	[] (deferred_probe_work_func) from [] (process_one_work+0x188/0x4bc)
	[] (process_one_work) from [] (worker_thread+0x4c/0x4f4)
	[] (worker_thread) from [] (kthread+0xe4/0xf8)
	[] (kthread) from [] (ret_from_fork+0x14/0x24)

Signed-off-by: Thierry Reding 
Fixes: c4fe70ada40f ("clk: tegra: Add closed loop support for the DFLL")
[vince.h@nvidia.com: Unlock rcu on error path]
Signed-off-by: Vince Hsu 
[sboyd@codeaurora.org: Dropped second hunk that nested the rcu
read lock unnecessarily]
Signed-off-by: Stephen Boyd

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2015-09-14T23:58:35+00:00

Pull clk fixes from Stephen Boyd:
 "A couple build fixes for drivers introduced in the merge window and a
  handful of patches to add more critical clocks on rockchip SoCs that
  are affected by newly introduced gpio clock handling"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: rockchip: Add pclk_peri to critical clocks on RK3066/RK3188
  clk: rockchip: add pclk_cpu to the list of rk3188 critical clocks
  clk: rockchip: handle critical clocks after registering all clocks
  clk: Hi6220: separately build stub clock driver
  clk: h8s2678: Fix compile error

clk: rockchip: add critical clock for rk3368

2015-09-14T19:49:39+00:00

Again a result of the gpio-clock-liberation the rk3368 needs the
pclk_pd_pmu marked as critical, to boot successfully.

Reported-by: Mark Rutland 
Signed-off-by: Heiko Stuebner 
Tested-by: Mark Rutland 
Signed-off-by: Stephen Boyd

Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2015-09-11T00:59:04+00:00

Pull late ARM SoC updates from Kevin Hilman:
 "This is a collection of a few late fixes and other misc stuff that had
  dependencies on things being merged from other trees.

  The bulk of the changes are for samsung/exynos SoCs for some changes
  that needed a few minor reworks so ended up a bit late.  The others
  are mainly for qcom SoCs: a couple fixes and some DTS updates"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits)
  ARM: multi_v7_defconfig: Enable PBIAS regulator
  soc: qcom: smd: Correct fBLOCKREADINTR handling
  soc: qcom: smd: Use correct remote processor ID
  soc: qcom: smem: Fix errant private access
  ARM: dts: qcom: msm8974-sony-xperia-honami: Use stdout-path
  ARM: dts: qcom: msm8960-cdp: Use stdout-path
  ARM: dts: qcom: msm8660-surf: Use stdout-path
  ARM: dts: qcom: ipq8064-ap148: Use stdout-path
  ARM: dts: qcom: apq8084-mtp: Use stdout-path
  ARM: dts: qcom: apq8084-ifc6540: Use stdout-path
  ARM: dts: qcom: apq8074-dragonboard: Use stdout-path
  ARM: dts: qcom: apq8064-ifc6410: Use stdout-path
  ARM: dts: qcom: apq8064-cm-qs600: Use stdout-path
  ARM: dts: qcom: Label serial nodes for aliasing and stdout-path
  reset: ath79: Fix missing spin_lock_init
  reset: Add (devm_)reset_control_get stub functions
  ARM: EXYNOS: switch to using generic cpufreq driver for exynos4x12
  cpufreq: exynos: Remove unselectable rule for arm-exynos-cpufreq.o
  ARM: dts: add iommu property to JPEG device for exynos4
  ARM: dts: enable SPI1 for exynos4412-odroidu3
  ...

clk: rockchip: Add pclk_peri to critical clocks on RK3066/RK3188

2015-09-10T20:55:30+00:00

Now that the rockchip clock subsystem does clock gating with GPIO banks,
these are no longer enabled once during probe and no longer stay enabled
for eternity. When all these clocks are disabled, the parent clock pclk_peri
might be disabled too, as no other child claims it. So, we need to add pclk_peri
to the critical clocks.

Signed-off-by: Romain Perier 
Tested-by: Michael Niewoehner 
Signed-off-by: Stephen Boyd

clk: rockchip: add pclk_cpu to the list of rk3188 critical clocks

2015-09-10T20:55:28+00:00

pclk_cpu needs to keep running because it is needed for devices like
the act8865 regulator but with the recent gpio clock handling this is
not always the case anymore. So add it to the list of critical clocks.

Signed-off-by: Michael Niewoehner 
Reviewed-by: Heiko Stuebner 
Signed-off-by: Stephen Boyd

clk: rockchip: handle critical clocks after registering all clocks

2015-09-10T20:55:21+00:00

Currently the registration of critical clocks is done in the function
shared between rk3066 and rk3188 clock trees. That results in them
getting handled maybe before all of them are registered.

Therefore move the critical clock handling down to the end of the soc-
specific clock registration function, so that all clocks are registered
before they're maybe handled as critical clock.

Signed-off-by: Heiko Stuebner 
Tested-by: Michael Niewoehner 
Signed-off-by: Stephen Boyd