linux.git/drivers/clk, branch v3.12-rc2

Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux

2013-09-09T22:49:04+00:00

Pull clock framework changes from Michael Turquette:
 "The common clk framework changes for 3.12 are dominated by clock
  driver patches, both new drivers and fixes to existing.  A high
  percentage of these are for Samsung platforms like Exynos.  Core
  framework fixes and some new features like automagical clock
  re-parenting round out the patches"

* tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux: (102 commits)
  clk: only call get_parent if there is one
  clk: samsung: exynos5250: Simplify registration of PLL rate tables
  clk: samsung: exynos4: Register PLL rate tables for Exynos4x12
  clk: samsung: exynos4: Register PLL rate tables for Exynos4210
  clk: samsung: exynos4: Reorder registration of mout_vpllsrc
  clk: samsung: pll: Add support for rate configuration of PLL46xx
  clk: samsung: pll: Use new registration method for PLL46xx
  clk: samsung: pll: Add support for rate configuration of PLL45xx
  clk: samsung: pll: Use new registration method for PLL45xx
  clk: samsung: exynos4: Rename exynos4_plls to exynos4x12_plls
  clk: samsung: exynos4: Remove checks for DT node
  clk: samsung: exynos4: Remove unused static clkdev aliases
  clk: samsung: Modify _get_rate() helper to use __clk_lookup()
  clk: samsung: exynos4: Use separate aliases for cpufreq related clocks
  clocksource: samsung_pwm_timer: Get clock from device tree
  ARM: dts: exynos4: Specify PWM clocks in PWM node
  pwm: samsung: Update DT bindings documentation to cover clocks
  clk: Move symbol export to proper location
  clk: fix new_parent dereference before null check
  clk: wm831x: Initialise wm831x pointer on init
  ...

clk: only call get_parent if there is one

2013-09-09T21:10:10+00:00

In __clk_init(), after a clock is mostly initialized, a scan is done
of the orphan clocks to see if the clock being registered is the
parent of any of them.

This code assumes that any clock that provides a get_parent method
actually has at least one parent, and that's not a valid assumption.

As a result, an orphan clock with no parent can return *something*
as the parent index, and that value is blindly used to dereference
the orphan's parent_names[] array (which will be ZERO_SIZE_PTR or
NULL).

Fix this by ensuring get_parent is only called for orphans with at
least one parent.

Signed-off-by: Alex Elder 
Signed-off-by: Mike Turquette

clk: samsung: exynos5250: Simplify registration of PLL rate tables

2013-09-06T20:34:05+00:00

Since the _get_rate() helper has been modified to use __clk_lookup()
internally, checking of PLL input rates can be done using it and so the
registration code can be simplified.

Signed-off-by: Tomasz Figa 
Signed-off-by: Kyungmin Park 
Reviewed-by: Sylwester Nawrocki 
Signed-off-by: Mike Turquette

clk: samsung: exynos4: Register PLL rate tables for Exynos4x12

2013-09-06T20:34:01+00:00

This patch adds rate tables for PLLs that can be reconfigured at runtime
for Exynos4x12 SoCs. Provided tables contain PLL coefficients for
input clock of 24 MHz and so are registered only in this case. MPLL does
not need runtime reconfiguration and so table for it is not provided.

Signed-off-by: Tomasz Figa 
Signed-off-by: Kyungmin Park 
Reviewed-by: Sylwester Nawrocki 
Signed-off-by: Mike Turquette

clk: samsung: exynos4: Register PLL rate tables for Exynos4210

2013-09-06T20:33:57+00:00

This patch adds rate tables for PLLs that can be reconfigured at runtime
for Exynos4210 SoCs. Provided tables contain PLL coefficients for
input clock of 24 MHz and so are registered only in this case. MPLL does
not need runtime reconfiguration and so table for it is not provided.

Signed-off-by: Tomasz Figa 
Signed-off-by: Kyungmin Park 
Reviewed-by: Sylwester Nawrocki 
Signed-off-by: Mike Turquette

clk: samsung: exynos4: Reorder registration of mout_vpllsrc

2013-09-06T20:33:52+00:00

Since PLL input frequency must be known before PLL registration,
mout_vpllsrc clock which is a reference clock of VPLL must be registered
before VPLL.

This patch reorders clock registration to register mout_vpllsrc before
VPLL.

Signed-off-by: Tomasz Figa 
Signed-off-by: Kyungmin Park 
Reviewed-by: Sylwester Nawrocki 
Signed-off-by: Mike Turquette

clk: samsung: pll: Add support for rate configuration of PLL46xx

2013-09-06T20:33:47+00:00

This patch implements round_rate and set_rate callbacks of PLL46xx
driver to allow reconfiguration of PLL at runtime.

Signed-off-by: Tomasz Figa 
Signed-off-by: Kyungmin Park 
Reviewed-by: Sylwester Nawrocki 
Signed-off-by: Mike Turquette

clk: samsung: pll: Use new registration method for PLL46xx

2013-09-06T20:33:43+00:00

This patch modifies PLL46xx support code and its users to use the
recently introduced common PLL registration helper.

Signed-off-by: Tomasz Figa 
Signed-off-by: Kyungmin Park 
Reviewed-by: Sylwester Nawrocki 
Signed-off-by: Mike Turquette

clk: samsung: pll: Add support for rate configuration of PLL45xx

2013-09-06T20:33:39+00:00

This patch implements round_rate and set_rate callbacks of PLL45xx
driver to allow reconfiguration of PLL at runtime.

Signed-off-by: Tomasz Figa 
Signed-off-by: Kyungmin Park 
Reviewed-by: Sylwester Nawrocki 
Signed-off-by: Mike Turquette

clk: samsung: pll: Use new registration method for PLL45xx

2013-09-06T20:33:35+00:00

This patch modifies PLL45xx support code and its users to use the
recently introduced common PLL registration helper.

Signed-off-by: Tomasz Figa 
Signed-off-by: Kyungmin Park 
Reviewed-by: Sylwester Nawrocki 
Signed-off-by: Mike Turquette