<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/clk/sunxi, branch v3.13</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>clk: sunxi: declare OF clock provider</title>
<updated>2013-09-29T19:07:16+00:00</updated>
<author>
<name>Sebastian Hesselbarth</name>
<email>sebastian.hesselbarth@gmail.com</email>
</author>
<published>2013-09-06T12:59:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=be0804513a506de96925f9ed1aa8dc1facd4c180'/>
<id>be0804513a506de96925f9ed1aa8dc1facd4c180</id>
<content type='text'>
Common clock framework allows to register clock providers to get called
on of_clk_init() by using CLK_OF_DECLARE. This converts sunxi clock
providers to make use of it and get rid of the mach specific clk init
call. As sunxi has a bunch of independent clk provider nodes, we hook
current clock init to board compatible to make it called once.

Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Acked-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Common clock framework allows to register clock providers to get called
on of_clk_init() by using CLK_OF_DECLARE. This converts sunxi clock
providers to make use of it and get rid of the mach specific clk init
call. As sunxi has a bunch of independent clk provider nodes, we hook
current clock init to board compatible to make it called once.

Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Acked-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: Fix incorrect placement of __initconst</title>
<updated>2013-08-28T01:35:43+00:00</updated>
<author>
<name>Sachin Kamat</name>
<email>sachin.kamat@linaro.org</email>
</author>
<published>2013-08-12T09:14:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=52be7cc862942ea0a53031b3b1ca84dc95422b5b'/>
<id>52be7cc862942ea0a53031b3b1ca84dc95422b5b</id>
<content type='text'>
__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat &lt;sachin.kamat@linaro.org&gt;
Cc: Emilio López &lt;emilio@elopez.com.ar&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
[mturquette@linaro.org: refreshed patch based on sunxi changes]
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat &lt;sachin.kamat@linaro.org&gt;
Cc: Emilio López &lt;emilio@elopez.com.ar&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
[mturquette@linaro.org: refreshed patch based on sunxi changes]
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: Add Allwinner A20 gates</title>
<updated>2013-08-26T08:58:21+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2013-07-25T19:06:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1fb2e4aab8b31b15e6be5debacb4203333360fd2'/>
<id>1fb2e4aab8b31b15e6be5debacb4203333360fd2</id>
<content type='text'>
The Allwinner A20 is almost identical to the earlier A10 SoC from
Allwinner on many aspects, including the clocks tree. However, since the
A20 has some additionnal IPs compared to the A10, the clock tree isn't
exactly the same, especially when it comes to the gated clocks
available. We thus need to register different clock gates for the A20.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Emilio López &lt;emilio@elopez.com.ar&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Allwinner A20 is almost identical to the earlier A10 SoC from
Allwinner on many aspects, including the clocks tree. However, since the
A20 has some additionnal IPs compared to the A10, the clock tree isn't
exactly the same, especially when it comes to the gated clocks
available. We thus need to register different clock gates for the A20.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Emilio López &lt;emilio@elopez.com.ar&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: Add A31 clocks support</title>
<updated>2013-08-26T08:58:11+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2013-07-23T21:34:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6a721db180a22d8e2d59d864446309bc7a09c26f'/>
<id>6a721db180a22d8e2d59d864446309bc7a09c26f</id>
<content type='text'>
The A31 has a mostly different clock set compared to the other older
SoCs currently supported in the Allwinner clock driver.

Add support for the basic useful clocks. The other ones will come in
eventually.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Emilio López &lt;emilio@elopez.com.ar&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The A31 has a mostly different clock set compared to the other older
SoCs currently supported in the Allwinner clock driver.

Add support for the basic useful clocks. The other ones will come in
eventually.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Emilio López &lt;emilio@elopez.com.ar&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: Allow to specify the divider width from the dividers data</title>
<updated>2013-08-26T08:48:45+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2013-07-23T07:25:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=70855bb5c608e4ac9dde5b669c3cf56914b713a2'/>
<id>70855bb5c608e4ac9dde5b669c3cf56914b713a2</id>
<content type='text'>
The divider width used to be hardcoded. Some A31 dividers are no longer
with the hardcoded width, so we need to make it specific to each divider
and set it in the dividers data.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Emilio López &lt;emilio@elopez.com.ar&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The divider width used to be hardcoded. Some A31 dividers are no longer
with the hardcoded width, so we need to make it specific to each divider
and set it in the dividers data.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Emilio López &lt;emilio@elopez.com.ar&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: Rename the structure to prepare the addition of sun6i</title>
<updated>2013-08-26T08:48:44+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2013-07-22T16:21:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=81ba6c5e7b1c995083ccaab1c74ac9e0be6ef4d1'/>
<id>81ba6c5e7b1c995083ccaab1c74ac9e0be6ef4d1</id>
<content type='text'>
Rename all the generic-named structure to sun4i to avoid confusion when
we will introduce the sun6i (A31) clocks.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Emilio López &lt;emilio@elopez.com.ar&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Rename all the generic-named structure to sun4i to avoid confusion when
we will introduce the sun6i (A31) clocks.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Emilio López &lt;emilio@elopez.com.ar&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: fix initialization of basic clocks</title>
<updated>2013-08-26T08:48:39+00:00</updated>
<author>
<name>Emilio López</name>
<email>emilio@elopez.com.ar</email>
</author>
<published>2013-07-23T01:01:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=431807f0bff97bbfddc7a2497038369ed2b4e508'/>
<id>431807f0bff97bbfddc7a2497038369ed2b4e508</id>
<content type='text'>
With the recent move towards CLK_OF_DECLARE(...), the driver stopped
initializing osc32k, which is compatible "fixed-clock". This is because
we never called of_clk_init(NULL). Fix this by moving the only other
simple clock (osc24M) to use CLK_OF_DECLARE(...) and call of_clk_init(NULL)
to initialize both of them.

Signed-off-by: Emilio López &lt;emilio@elopez.com.ar&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With the recent move towards CLK_OF_DECLARE(...), the driver stopped
initializing osc32k, which is compatible "fixed-clock". This is because
we never called of_clk_init(NULL). Fix this by moving the only other
simple clock (osc24M) to use CLK_OF_DECLARE(...) and call of_clk_init(NULL)
to initialize both of them.

Signed-off-by: Emilio López &lt;emilio@elopez.com.ar&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: Add A10s gates</title>
<updated>2013-08-26T08:46:32+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2013-07-16T09:21:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2371dd88b80fc847a451d5eff018e165501f560a'/>
<id>2371dd88b80fc847a451d5eff018e165501f560a</id>
<content type='text'>
The Allwinner A10s has a slightly different gates set than the A10 and
A13, so add these gates to the clk driver.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Tested-by: Emilio López &lt;emilio@elopez.com.ar&gt;
Reviewed-by: Emilio López &lt;emilio@elopez.com.ar&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Allwinner A10s has a slightly different gates set than the A10 and
A13, so add these gates to the clk driver.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Tested-by: Emilio López &lt;emilio@elopez.com.ar&gt;
Reviewed-by: Emilio López &lt;emilio@elopez.com.ar&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: add CLK_SET_RATE_NO_REPARENT flag</title>
<updated>2013-08-19T19:27:17+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2013-07-29T11:25:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=819c1de344c5b8350bffd35be9a0fa74541292d3'/>
<id>819c1de344c5b8350bffd35be9a0fa74541292d3</id>
<content type='text'>
Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes
being reparented during clk_set_rate.

To avoid breaking existing platforms, all callers of clk_register_mux()
are adjusted to pass the new flag. Platform maintainers are encouraged
to remove the flag if they wish to allow mux reparenting on set_rate.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Sascha Hauer &lt;kernel@pengutronix.de&gt;
Cc: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Viresh Kumar &lt;viresh.linux@gmail.com&gt;
Cc: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Cc: Haojian Zhuang &lt;haojian.zhuang@linaro.org&gt;
Cc: Chao Xie &lt;xiechao.mail@gmail.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: "Emilio López" &lt;emilio@elopez.com.ar&gt;
Cc: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Cc: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Cc: Prashant Gaikwad &lt;pgaikwad@nvidia.com&gt;
Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Cc: Pawel Moll &lt;pawel.moll@arm.com&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Andrew Chew &lt;achew@nvidia.com&gt;
Cc: Doug Anderson &lt;dianders@chromium.org&gt;
Cc: Heiko Stuebner &lt;heiko@sntech.de&gt;
Cc: Paul Walmsley &lt;pwalmsley@nvidia.com&gt;
Cc: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
Cc: Thomas Abraham &lt;thomas.abraham@linaro.org&gt;
Cc: Tomasz Figa &lt;t.figa@samsung.com&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: spear-devel@list.st.com
Cc: linux-tegra@vger.kernel.org
Tested-by: Haojian Zhuang &lt;haojian.zhuang@gmail.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt; [tegra]
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt; [sunxi]
Acked-by: Sören Brinkmann &lt;soren.brinkmann@xilinx.com&gt; [Zynq]
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes
being reparented during clk_set_rate.

To avoid breaking existing platforms, all callers of clk_register_mux()
are adjusted to pass the new flag. Platform maintainers are encouraged
to remove the flag if they wish to allow mux reparenting on set_rate.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Sascha Hauer &lt;kernel@pengutronix.de&gt;
Cc: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Viresh Kumar &lt;viresh.linux@gmail.com&gt;
Cc: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Cc: Haojian Zhuang &lt;haojian.zhuang@linaro.org&gt;
Cc: Chao Xie &lt;xiechao.mail@gmail.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: "Emilio López" &lt;emilio@elopez.com.ar&gt;
Cc: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Cc: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Cc: Prashant Gaikwad &lt;pgaikwad@nvidia.com&gt;
Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Cc: Pawel Moll &lt;pawel.moll@arm.com&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Andrew Chew &lt;achew@nvidia.com&gt;
Cc: Doug Anderson &lt;dianders@chromium.org&gt;
Cc: Heiko Stuebner &lt;heiko@sntech.de&gt;
Cc: Paul Walmsley &lt;pwalmsley@nvidia.com&gt;
Cc: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
Cc: Thomas Abraham &lt;thomas.abraham@linaro.org&gt;
Cc: Tomasz Figa &lt;t.figa@samsung.com&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: spear-devel@list.st.com
Cc: linux-tegra@vger.kernel.org
Tested-by: Haojian Zhuang &lt;haojian.zhuang@gmail.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt; [tegra]
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt; [sunxi]
Acked-by: Sören Brinkmann &lt;soren.brinkmann@xilinx.com&gt; [Zynq]
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: Fix checking return value of clk_register_[composite|factors]</title>
<updated>2013-08-08T22:57:27+00:00</updated>
<author>
<name>Axel Lin</name>
<email>axel.lin@ingics.com</email>
</author>
<published>2013-07-12T08:15:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ee85e9bd25773a30002769c8121b6ae62f23f2b4'/>
<id>ee85e9bd25773a30002769c8121b6ae62f23f2b4</id>
<content type='text'>
clk_register_composite() and clk_register_factors() return ERR_PTR on error.

Signed-off-by: Axel Lin &lt;axel.lin@ingics.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
clk_register_composite() and clk_register_factors() return ERR_PTR on error.

Signed-off-by: Axel Lin &lt;axel.lin@ingics.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
