linux.git/drivers/clk/stm32, branch for-next

clk: Switch back to struct platform_driver::remove()

2024-09-21T21:12:05+00:00

After commit 0edb555a65d1 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.

Convert all clk drivers to use .remove(), with the eventual goal to drop
struct platform_driver::remove_new(). As .remove() and .remove_new() have
the same prototypes, conversion is done by just changing the structure
member name in the driver initializer.

Signed-off-by: Uwe Kleine-König 
Link: https://lore.kernel.org/r/20240909144026.870565-2-u.kleine-koenig@baylibre.com
Acked-by: Geert Uytterhoeven  # renesas
Signed-off-by: Stephen Boyd

clk: stm32mp25: add security clocks

2024-06-03T21:10:46+00:00

Add ck_icn_p_iwdg1, ck_icn_p_pka, ck_icn_p_rng, ck_icn_p_saes,
ck_icn_p_serc clocks.
They could be configured for non secured world.

Signed-off-by: Gabriel Fernandez 
Link: https://lore.kernel.org/r/20240529131310.260954-3-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd

clk: stm32mp2: use of STM32 access controller

2024-06-03T21:10:46+00:00

Use an STM32 access controller to filter the registration of clocks.
If a clock is used by the security world, then it must not registered.

Signed-off-by: Gabriel Fernandez 
Link: https://lore.kernel.org/r/20240529131310.260954-2-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd

clk: stm32: introduce clocks for STM32MP257 platform

2024-04-12T06:20:27+00:00

This driver is intended for the STM32MP25 clock family and utilizes
the stm32-core API, similar to the stm32mp13 clock driver.

Signed-off-by: Gabriel Fernandez 
Link: https://lore.kernel.org/r/20240411092453.243633-4-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd

clk: stm32mp13: use platform device APIs

2024-04-12T06:01:03+00:00

Convert devm_platform_ioremap_resource() and remove unnecessary
dependency check with SCMI clock driver.

Signed-off-by: Gabriel Fernandez 
Link: https://lore.kernel.org/r/20240411092453.243633-2-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd

clk: stm32mp1: use stm32mp13 reset driver

2023-12-17T23:33:26+00:00

STM32MP15 is now using the same reset driver as STM32MP13 as they
have the same binding requirement.

Signed-off-by: Gabriel Fernandez 
Link: https://lore.kernel.org/r/20231208143700.354785-3-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd

clk: stm32mp1: move stm32mp1 clock driver into stm32 directory

2023-12-17T23:33:26+00:00

Move all STM32MP clock drivers into same directory (stm32).

Signed-off-by: Gabriel Fernandez 
Link: https://lore.kernel.org/r/20231208143700.354785-2-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd

clk: stm32: Fix a signedness issue in clk_stm32_composite_determine_rate()

2023-10-13T00:30:54+00:00

The divider_ro_round_rate() function could potentially return -EINVAL on
error but the error handling doesn't work because "rate" is unsigned.
It should be a type long.

Fixes: 06ed0fc0fbac ("clk: stm32: composite: Switch to determine_rate")
Signed-off-by: Dan Carpenter 
Link: https://lore.kernel.org/r/d9a78453-9b40-48c1-830e-00751ba3ecb8@kili.mountain
Acked-by: Maxime Ripard 
Signed-off-by: Stephen Boyd

clk: stm32: composite: Switch to determine_rate

2023-06-09T01:39:35+00:00

The STM32 composite clocks implements a mux with a set_parent hook, but
doesn't provide a determine_rate implementation.

This is a bit odd, since set_parent() is there to, as its name implies,
change the parent of a clock. However, the most likely candidate to
trigger that parent change is a call to clk_set_rate(), with
determine_rate() figuring out which parent is the best suited for a
given rate.

The other trigger would be a call to clk_set_parent(), but it's far less
used, and it doesn't look like there's any obvious user for that clock.

So, the set_parent hook is effectively unused, possibly because of an
oversight. However, it could also be an explicit decision by the
original author to avoid any reparenting but through an explicit call to
clk_set_parent().

The driver does implement round_rate() though, which means that we can
change the rate of the clock, but we will never get to change the
parent.

However, It's hard to tell whether it's been done on purpose or not.

Since we'll start mandating a determine_rate() implementation, let's
convert the round_rate() implementation to a determine_rate(), which
will also make the current behavior explicit. And if it was an
oversight, the clock behaviour can be adjusted later on.

Cc: Alexandre Torgue 
Cc: Maxime Coquelin 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-stm32@st-md-mailman.stormreply.com
Signed-off-by: Maxime Ripard 
Link: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v4-63-971d5077e7d2@cerno.tech
Signed-off-by: Stephen Boyd

clk: stm32: core: Add a determine_rate hook

2023-06-09T01:39:30+00:00

The STM32 mux clock implements a mux with a set_parent hook, but
doesn't provide a determine_rate implementation.

This is a bit odd, since set_parent() is there to, as its name implies,
change the parent of a clock. However, the most likely candidate to
trigger that parent change is a call to clk_set_rate(), with
determine_rate() figuring out which parent is the best suited for a
given rate.

The other trigger would be a call to clk_set_parent(), but it's far less
used, and it doesn't look like there's any obvious user for that clock.

So, the set_parent hook is effectively unused, possibly because of an
oversight. However, it could also be an explicit decision by the
original author to avoid any reparenting but through an explicit call to
clk_set_parent().

The latter case would be equivalent to setting the flag
CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook
to __clk_mux_determine_rate(). Indeed, if no determine_rate
implementation is provided, clk_round_rate() (through
clk_core_round_rate_nolock()) will call itself on the parent if
CLK_SET_RATE_PARENT is set, and will not change the clock rate
otherwise.

And if it was an oversight, then we are at least explicit about our
behavior now and it can be further refined down the line.

Since the CLK_SET_RATE_NO_REPARENT flag was already set though, it seems
unlikely.

Cc: Alexandre Torgue 
Cc: Maxime Coquelin 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-stm32@st-md-mailman.stormreply.com
Signed-off-by: Maxime Ripard 
Link: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v4-33-971d5077e7d2@cerno.tech
Signed-off-by: Stephen Boyd