linux.git/drivers/clk/shmobile, branch v4.1

ARM: shmobile: r8a7778: common clock framework CPG driver

2015-02-27T00:49:25+00:00

Driver for the r8a7778's clocks that depend on the mode bits.

Signed-off-by: Ulrich Hecht 
Acked-by: Laurent Pinchart 
Acked-by: Michael Turquette 
Signed-off-by: Simon Horman

Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux

2015-02-21T20:30:30+00:00

Pull clock framework updates from Mike Turquette:
 "The clock framework changes contain the usual driver additions,
  enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
  devices.

  Additionally the framework core underwent a bit of surgery with two
  major changes:

   - The boundary between the clock core and clock providers (e.g clock
     drivers) is now more well defined with dedicated provider helper
     functions.  struct clk no longer maps 1:1 with the hardware clock
     but is a true per-user cookie which helps us tracker users of
     hardware clocks and debug bad behavior.

   - The addition of rate constraints for clocks.  Rate ranges are now
     supported which are analogous to the voltage ranges in the
     regulator framework.

  Unfortunately these changes to the core created some breakeage.  We
  think we fixed it all up but for this reason there are lots of last
  minute commits trying to undo the damage"

* tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits)
  clk: Only recalculate the rate if needed
  Revert "clk: mxs: Fix invalid 32-bit access to frac registers"
  clk: qoriq: Add support for the platform PLL
  powerpc/corenet: Enable CLK_QORIQ
  clk: Replace explicit clk assignment with __clk_hw_set_clk
  clk: Add __clk_hw_set_clk helper function
  clk: Don't dereference parent clock if is NULL
  MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr
  clkdev: Always allocate a struct clk and call __clk_get() w/ CCF
  clk: shmobile: div6: Avoid division by zero in .round_rate()
  clk: mxs: Fix invalid 32-bit access to frac registers
  clk: omap: compile legacy omap3 clocks conditionally
  clkdev: Export clk_register_clkdev
  clk: Add rate constraints to clocks
  clk: remove clk-private.h
  pci: xgene: do not use clk-private.h
  arm: omap2+ remove dead clock code
  clk: Make clk API return per-user struct clk instances
  clk: tegra: Define PLLD_DSI and remove dsia(b)_mux
  clk: tegra: Add support for the Tegra132 CAR IP block
  ...

clk: shmobile: div6: Avoid division by zero in .round_rate()

2015-02-04T22:02:42+00:00

Anyone may call clk_round_rate() with a zero rate value, so we have to
protect against that.

Signed-off-by: Geert Uytterhoeven 
Acked-by: Wolfram Sang 
Signed-off-by: Michael Turquette

clk: shmobile: fix sparse NULL pointer warning

2015-01-14T04:13:24+00:00

Fixes the following sparse warnings:

drivers/clk/shmobile/clk-sh73a0.c:57:17: warning:
 Using plain integer as NULL pointer

Signed-off-by: Wei Yongjun 
Signed-off-by: Simon Horman

clk: shmobile: Add R-Car Gen2 ADSP clock support

2015-01-08T15:14:31+00:00

Add the ADSP clock support to the R-Car generation 2 CPG driver.  This clock
gets derived from  PLL1.  The layout of the ADSPCKCR register is  similar to
those of the clocks supported by the 'clk-div6' driver but the divider encoding
is non-linear, so can't be supported by that driver...

Based on the original patch by Konstantin Kozhevnikov
.

Signed-off-by: Sergei Shtylyov 
Signed-off-by: Geert Uytterhoeven

clk: shmobile: Add R-Car Gen2 RCAN clock support

2015-01-08T15:14:31+00:00

Add the RCAN clock support to the R-Car generation 2 CPG driver.  This clock
gets derived from  the USB_EXTAL clock, dividing  it by 6.  The layout of the
RCANCKCR register is similar to those of the clocks supported by the 'clk-div6'
driver but has no divider field, and so can't be supported by that driver...

Signed-off-by: Sergei Shtylyov 
Signed-off-by: Geert Uytterhoeven

clk: shmobile: r8a73a4 common clock framework implementation

2015-01-08T15:14:30+00:00

Driver for the R8A73A4's clocks that are too specific to be supported by a
generic driver.

Signed-off-by: Ulrich Hecht 
Acked-by: Michael Turquette 
Acked-by: Laurent Pinchart 
Signed-off-by: Geert Uytterhoeven

clk: shmobile: Add r8a7793 support

2015-01-08T15:14:29+00:00

R-Car M2N (r8a7793) clock is handled in R-Car Gen2 clock driver.

Signed-off-by: Hisashi Nakamura 
Signed-off-by: Yoshihiro Kaneko 
Signed-off-by: Geert Uytterhoeven

clk: shmobile: div6: Avoid changing divisor in .disable()

2015-01-08T15:13:19+00:00

While DIV6 clocks require the divisor field to be non-zero when stopping
the clock, some clocks (e.g. ZB on sh73a0) fail to be re-enabled later
if the divisor field is changed when stopping the clock.
The reason for this is unknown.

To fix this, do not touch the divisor field if it's already non-zero.

On kzm9g, the smsc911x Ethernet controller is connected to the sh73a0
Bus State Controller, which is clocked by the ZB clock. Without this
fix, if the ZB clock is disabled during system suspend, and re-enabled
during resume, the kernel locks up when the smsc911x driver tries to
access the Ethernet registers.

Signed-off-by: Geert Uytterhoeven 
Acked-by: Laurent Pinchart

clk: shmobile: sh73a0 common clock framework implementation

2014-12-21T08:09:20+00:00

Driver for the SH73A0's clocks that are too specific to be supported by a
generic driver.

Signed-off-by: Ulrich Hecht 
Acked-by: Mike Turquette 
Tested-by: Geert Uytterhoeven 
Acked-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman