linux.git/drivers/clk/rockchip, branch v4.5

clk: rockchip: rk3368: fix some clock gates

2016-01-16T15:01:21+00:00

Reference to the Rockchip RK3368 TRM v1.1, some clock
gates need to be updated.

Signed-off-by: Jianqun xu 
Signed-off-by: Caesar Wang 
Signed-off-by: Heiko Stuebner

clk: rockchip: rk3036: rename emac ext source clock

2016-01-16T15:01:21+00:00

There is only support rmii in the RK3036, so we should use the correct
ext clock name as described in the TRM.

Signed-off-by: Xing Zheng 
[update dt-binding document as well]
Signed-off-by: Heiko Stuebner

clk: rockchip: rk3036: fix the div offset for emac clock

2016-01-16T15:01:21+00:00

Due to reference to old version TRM, there are incorrect emac clock node.
The SEL_21_9 is used for the parent div, the SEL_21_4 is used for the
child div.

Signed-off-by: Xing Zheng 
Signed-off-by: Heiko Stuebner

clk: rockchip: rk3036: fix uarts clock error

2016-01-16T15:01:21+00:00

Due to a copy-paste error the uart1 and uart2 clock div set
incorrect, fix it.

Signed-off-by: Xing Zheng 
Signed-off-by: Heiko Stuebner

clk: rockchip: rk3036: fix the FLAGs for clock mux

2016-01-16T15:01:21+00:00

The DFLAGS are used for the clock dividers, the CLKSEL_CON flags
of COMPOSITE_NODIV type should be MFLAGS.

Signed-off-by: Xing Zheng 
Signed-off-by: Heiko Stuebner

Merge branch 'clk-rockchip' into clk-next

2016-01-02T21:41:09+00:00

clk: rockchip: fix section mismatches with new child-clocks

2016-01-02T21:40:29+00:00

To model the muxes downstream of fractional dividers we introduced the
child property, allowing to describe a direct child clock.
The first implementation seems to cause section warnings, as the core
clock-tree is marked as initdata while the data pointed to from the
child element is not.

While there may be some way to also set that missing property in the
inline notation I didn't find it, so to actually fix the issue for now
move the sub-definitions into separate declarations that can have
their own __initdata properties.

Signed-off-by: Heiko Stuebner 
Signed-off-by: Michael Turquette

Merge branch 'clk-rockchip' into clk-next

2015-12-23T21:08:56+00:00

clk: rockchip: rk3036: include downstream muxes into fractional dividers

2015-12-23T20:57:31+00:00

Use the newly introduced possibility to combine the fractional dividers
with their downstream muxes for all fractional dividers on currently
supported RK3036 SoCs.

Signed-off-by: Xing Zheng 
Signed-off-by: Caesar Wang 
Signed-off-by: Heiko Stuebner 
Signed-off-by: Michael Turquette

clk: rockchip: Allow the RK3288 SPDIF clocks to change their parent

2015-12-23T20:57:30+00:00

The clock branches leading to sclk_spdif and sclk_spdif_8ch on RK3288
SoCs only feed those clocks, allow those clocks to change their parents
all the way up the hierarchy.

Signed-off-by: Sjoerd Simons 
Signed-off-by: Heiko Stuebner 
Signed-off-by: Michael Turquette