Patch (7705bb7176b9 clk: qcom: mmcc-msm8996: leave all mmagic gdscs
and clocks always enabled") makes all mmgaic gdscs ALWAYS_ON.
The mmagic_bimc_gdsc is also needed to be turned on to get display
working on 8x96.
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Fixes: 7705bb7176b9 ("clk: qcom: mmcc-msm8996: leave all mmagic gdscs and clocks always enabled")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Commit 12d807cd34b8 ("clk: qcom: gcc-msm8996: Disable halt check on UFS
clocks") marked BRANCH_HALT_SKIP for ufs rx clocks, but missed ufs tx
clocks. The result of that is kernel warnings at reboot:
[ 105.624283] gcc_ufs_tx_symbol_0_clk status stuck at 'on'
[ 105.624311] WARNING: CPU: 1 PID: 1 at drivers/clk/qcom/clk-branch.c:100 clk_branch_toggle+0x190/0x1b0
[ 105.633235] Modules linked in:
[ 105.645118] CPU: 1 PID: 1 Comm: systemd-shutdow Tainted: G W 4.18.0-rc2-00002-g2bfbe52a53a3 #11
[ 105.647988] Hardware name: Qualcomm Technologies, Inc. DB820c (DT)
[ 105.657966] pstate: 60000085 (nZCv daIf -PAN -UAO)
[ 105.664127] pc : clk_branch_toggle+0x190/0x1b0
[ 105.668900] lr : clk_branch_toggle+0x190/0x1b0
[ 105.673324] sp : ffff00000805bb40
[ 105.677751] x29: ffff00000805bb40 x28: 0000000000000000
[ 105.681140] x27: ffff8000d947cc60 x26: 0000000000000001
[ 105.686520] x25: ffff000008f71900 x24: 0000000000000000
[ 105.691816] x23: ffff00000925e338 x22: ffff00000855f8e0
[ 105.697114] x21: 0000000000000000 x20: 0000000000000000
[ 105.702407] x19: ffff0000091c9000 x18: ffffffffffffffff
[ 105.707702] x17: 0000ffffac148c58 x16: ffff000008b82928
[ 105.712998] x15: ffff0000091c96c8 x14: ffff0000893817c7
[ 105.718293] x13: ffff0000093817d5 x12: ffff0000091c9940
[ 105.723587] x11: ffff0000085e3e70 x10: ffff00000805b780
[ 105.728884] x9 : ffff00000805bb40 x8 : 7320737574617473
[ 105.734179] x7 : 206b6c635f305f6c x6 : 00000000000001e5
[ 105.739472] x5 : 0000000000000000 x4 : 0000000000000000
[ 105.744769] x3 : ffffffffffffffff x2 : ffff0000091e2658
[ 105.750063] x1 : a7c4712dd5e09c00 x0 : 0000000000000000
[ 105.755360] Call trace:
[ 105.760652] clk_branch_toggle+0x190/0x1b0
[ 105.762824] clk_branch2_disable+0x18/0x20
[ 105.766994] clk_core_disable+0x58/0xa8
[ 105.771069] clk_core_disable_lock+0x20/0x38
[ 105.774803] clk_disable+0x1c/0x28
[ 105.779320] __ufshcd_setup_clocks+0x298/0x308
[ 105.782529] ufshcd_suspend+0x160/0x308
[ 105.786953] ufshcd_shutdown+0x38/0xa0
[ 105.790690] ufshcd_pltfrm_shutdown+0x10/0x18
[ 105.794512] platform_drv_shutdown+0x20/0x30
[ 105.798935] device_shutdown+0x110/0x1e8
[ 105.803278] kernel_restart_prepare+0x34/0x40
[ 105.807181] kernel_restart+0x14/0x78
[ 105.811434] sys_reboot+0x200/0x248
[ 105.815081] el0_svc_naked+0x30/0x34
[ 105.818378] ---[ end trace 8d2322276b27879c ]---
Mark gcc_ufs_tx_symbol_0_clk as BRANCH_HALT_SKIP as well.
Fixes: 12d807cd34b8 ("clk: qcom: gcc-msm8996: Disable halt check on UFS clocks")
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Pull clk updates from Stephen Boyd: "This time we have a good set of changes to the core framework that do some general cleanups, but nothing too major. The majority of the diff goes to two SoCs, Actions Semi and Qualcomm. A brand new driver is introduced for Actions Semi so it takes up some lines to add all the different types, and the Qualcomm diff is there because we add support for two SoCs and it's quite a bit of data. Otherwise the big driver updates are on TI Davinci and Amlogic platforms. And then the long tail of driver updates for various fixes and stuff follows after that. Core: - debugfs cleanups removing error checking and an unused provider API - Removal of a clk init typedef that isn't used - Usage of match_string() to simplify parent string name matching - OF clk helpers moved to their own file (linux/of_clk.h) - Make clk warnings more readable across kernel versions New Drivers: - Qualcomm SDM845 GCC and Video clk controllers - Qualcomm MSM8998 GCC - Actions Semi S900 SoC support - Nuvoton npcm750 microcontroller clks - Amlogic axg AO clock controller Removed Drivers: - Deprecated Rockchip clk-gate driver Updates: - debugfs functions stopped checking return values - Support for the MSIOF module clocks on Rensas R-Car M3-N - Support for the new Rensas RZ/G1C and R-Car E3 SoCs - Qualcomm GDSC, RCG, and PLL updates for clk changes in new SoCs - Berlin and Amlogic SPDX tagging - Usage of of_clk_get_parent_count() in more places - Proper implementation of the CDEV1/2 clocks on Tegra20 - Allwinner H6 PRCM clock support and R40 EMAC support - Add critical flag to meson8b's fdiv2 as temporary fixup for ethernet - Round closest support for meson's mpll driver - Support for meson8b nand clocks and gxbb video decoder clocks - Mediatek mali clks - STM32MP1 fixes - Uniphier LD11/LD20 stream demux system clock" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (134 commits) clk: qcom: Export clk_fabia_pll_configure() clk: bcm: Update and add Stingray clock entries dt-bindings: clk: Update Stingray binding doc clk-si544: Properly round requested frequency to nearest match clk: ingenic: jz4770: Add 150us delay after enabling VPU clock clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clock clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idle clk: ingenic: jz4770: Change OTG from custom to standard gated clock clk: ingenic: Support specifying "wait for clock stable" delay clk: ingenic: Add support for clocks whose gate bit is inverted clk: use match_string() helper clk: bcm2835: use match_string() helper clk: Return void from debug_init op clk: remove clk_debugfs_add_file() clk: tegra: no need to check return value of debugfs_create functions clk: davinci: no need to check return value of debugfs_create functions clk: bcm2835: no need to check return value of debugfs_create functions clk: no need to check return value of debugfs_create functions clk: imx6: add EPIT clock support clk: mvebu: use correct bit for 98DX3236 NAND ...
Replaces open-coded struct size calculations with struct_size() for devm_*, f2fs_*, and sock_* allocations. Automatically generated (and manually adjusted) from the following Coccinelle script: // Direct reference to struct field. @@ identifier alloc =~ "devm_kmalloc|devm_kzalloc|sock_kmalloc|f2fs_kmalloc|f2fs_kzalloc"; expression HANDLE; expression GFP; identifier VAR, ELEMENT; expression COUNT; @@ - alloc(HANDLE, sizeof(*VAR) + COUNT * sizeof(*VAR->ELEMENT), GFP) + alloc(HANDLE, struct_size(VAR, ELEMENT, COUNT), GFP) // mr = kzalloc(sizeof(*mr) + m * sizeof(mr->map[0]), GFP_KERNEL); @@ identifier alloc =~ "devm_kmalloc|devm_kzalloc|sock_kmalloc|f2fs_kmalloc|f2fs_kzalloc"; expression HANDLE; expression GFP; identifier VAR, ELEMENT; expression COUNT; @@ - alloc(HANDLE, sizeof(*VAR) + COUNT * sizeof(VAR->ELEMENT[0]), GFP) + alloc(HANDLE, struct_size(VAR, ELEMENT, COUNT), GFP) // Same pattern, but can't trivially locate the trailing element name, // or variable name. @@ identifier alloc =~ "devm_kmalloc|devm_kzalloc|sock_kmalloc|f2fs_kmalloc|f2fs_kzalloc"; expression HANDLE; expression GFP; expression SOMETHING, COUNT, ELEMENT; @@ - alloc(HANDLE, sizeof(SOMETHING) + COUNT * sizeof(ELEMENT), GFP) + alloc(HANDLE, CHECKME_struct_size(&SOMETHING, ELEMENT, COUNT), GFP) Signed-off-by: Kees Cook <keescook@chromium.org>
* clk-qcom-8996-halt: clk: qcom: gcc-msm8996: Disable halt check on UFS clocks clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk
* clk-qcom-sdm845: clk: qcom: Export clk_fabia_pll_configure() clk: qcom: Add video clock controller driver for SDM845 dt-bindings: clock: Introduce QCOM Video clock bindings clk: qcom: Add Global Clock controller (GCC) driver for SDM845 clk: qcom: Add DT bindings for SDM845 gcc clock controller clk: qcom: Configure the RCGs to a safe source as needed clk: qcom: Add support for BRANCH_HALT_SKIP flag for branch clocks clk: qcom: Simplify gdsc status checking logic clk: qcom: gdsc: Add support to poll CFG register to check GDSC state clk: qcom: gdsc: Add support to poll for higher timeout value clk: qcom: gdsc: Add support to reset AON and block reset logic clk: qcom: Add support for controlling Fabia PLL clk: qcom: Clear hardware clock control bit of RCG Also fixup the Kconfig mess where SDM845 GCC has msm8998 in the description and also the video Kconfig says things slightly differently from the GCC one so just make it the same.
* clk-allwinner: clk: sunxi-ng: r40: export a regmap to access the GMAC register clk: sunxi-ng: r40: rewrite init code to a platform driver clk: sunxi-ng: add support for H6 PRCM CCU * clk-rockchip: clk: rockchip: remove deprecated gate-clk code and dt-binding clk: rockchip: use match_string() helper * clk-tegra: clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20 clk: tegra20: Correct parents of CDEV1/2 clocks clk: tegra20: Add DEV1/DEV2 OSC dividers * clk-berlin: clk: berlin: switch to SPDX license identifier * clk-qcom-mmagic: clk: qcom: mmcc-msm8996: leave all mmagic gdscs and clocks always enabled clk: qcom: Register the gdscs before the clocks clk: qcom: gdsc: Add support for ALWAYS_ON gdscs
* clk-qcom-rpmh: dt-bindings: clock: Introduce QCOM RPMh clock bindings * clk-npcm7xx: clk: npcm7xx: fix return value check in npcm7xx_clk_init() clk: npcm7xx: add clock controller dt-binding: clk: npcm750: Add binding for Nuvoton NPCM7XX Clock * clk-of-parent-count: pinctrl: sunxi: Use of_clk_get_parent_count() instead of open coding soc/tegra: pmc: Use of_clk_get_parent_count() instead of open coding soc: rockchip: power-domain: Use of_clk_get_parent_count() instead of open coding ARM: timer-sp: Use of_clk_get_parent_count() instead of open coding clk: Extract OF clock helpers in <linux/of_clk.h> * clk-qcom-rcg-fix: clk: qcom: Base rcg parent rate off plan frequency
This is used by the video clk driver on sdm845 and that's a module. Export it to prevent module build failures. Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The halt check of the UFS symbol clocks always fails, as such probing UFS after clk_disable_unused always fails. This makes it impossible to boot a system with the UFS phy or UFS HCD drivers compiled as modules. Follow SDM845 and disable the halt check on these clocks. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>