linux.git/drivers/clk/qcom/common.h, branch for-next

clk: qcom: constify static 'struct qcom_icc_hws_data'

2024-10-06T03:18:22+00:00

Drivers and core code does not modify the file-scope static 'struct
qcom_icc_hws_data', so it can be made const for code safety and
readability.

Signed-off-by: Krzysztof Kozlowski 
Link: https://lore.kernel.org/r/20240905150235.276345-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson

clk: qcom: common: Add interconnect clocks support

2024-07-08T16:40:57+00:00

Unlike MSM platforms that manage NoC related clocks and scaling
from RPM, IPQ SoCs dont involve RPM in managing NoC related
clocks and there is no NoC scaling.

However, there is a requirement to enable some NoC interface
clocks for accessing the peripheral controllers present on
these NoCs. Though exposing these as normal clocks would work,
having a minimalistic interconnect driver to handle these clocks
would make it consistent with other Qualcomm platforms resulting
in common code paths. This is similar to msm8996-cbf's usage of
icc-clk framework.

Signed-off-by: Varadarajan Narayanan 
Link: https://lore.kernel.org/r/20240430064214.2030013-5-quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson

clk: qcom: common: commonize qcom_cc_really_probe

2024-06-13T04:04:26+00:00

The previous wrapper qcom_cc_really_probe takes the platform
device as parameter, which is limited to platform driver.

As for qca8k clock controller driver, which is registered as
the MDIO device, which also follows the qcom clock framework.

To commonize qcom_cc_really_probe, updating it to take the
struct device as parameter, so that the qcom_cc_really_probe
can be utilized by the previous platform device and the new
added MDIO device.

Also update the current clock controller drivers to take
&pdev->dev as parameter when calling qcom_cc_really_probe.

Reviewed-by: Stephen Boyd 
Tested-by: Bryan O'Donoghue 
Reviewed-by: Bryan O'Donoghue 
Signed-off-by: Luo Jie 
Link: https://lore.kernel.org/r/20240605124541.2711467-4-quic_luoj@quicinc.com
Signed-off-by: Bjorn Andersson

clk: qcom: clk-rcg2: add support for rcg2 freq multi ops

2024-04-27T18:01:14+00:00

Some RCG frequency can be reached by multiple configuration.

Add clk_rcg2_fm_ops ops to support these special RCG configurations.

These alternative ops will select the frequency using a CEIL policy.

When the correct frequency is found, the correct config is selected by
calculating the final rate (by checking the defined parent and values
in the config that is being checked) and deciding based on the one that
is less different than the requested one.

These check are skipped if there is just one config for the requested
freq.

qcom_find_freq_multi is added to search the freq with the new struct
freq_multi_tbl.
__clk_rcg2_select_conf is used to select the correct conf by simulating
the final clock.
If a conf can't be found due to parent not reachable, a WARN is printed
and -EINVAL is returned.

Tested-by: Wei Lei 
Signed-off-by: Christian Marangi 
Acked-by: Stephen Boyd 
Link: https://lore.kernel.org/r/20231220221724.3822-3-ansuelsmth@gmail.com
Signed-off-by: Bjorn Andersson

clk: qcom: regmap-mux: fix parent clock lookup

2021-12-02T23:07:34+00:00

The function mux_get_parent() uses qcom_find_src_index() to find the
parent clock index, which is incorrect: qcom_find_src_index() uses src
enum for the lookup, while mux_get_parent() should use cfg field (which
corresponds to the register value). Add qcom_find_cfg_index() function
doing this kind of lookup and use it for mux parent lookup.

Fixes: df964016490b ("clk: qcom: add parent map for regmap mux")
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Baryshkov 
Link: https://lore.kernel.org/r/20211115233407.1046179-1-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd

clk: qcom: define probe by index API as common API

2019-08-08T15:20:01+00:00

Extend the probe by index API in common code to be used
by other qcom clock controller.

Signed-off-by: Govind Singh 
Signed-off-by: Stephen Boyd

clk: qcom: Make common clk_hw registrations

2019-02-22T08:06:57+00:00

Several clock controller drivers define a list of clk_hw devices, and then
register those devices in probe() before using common code to process the
rest of initialization.  Extend the common code to accept a list of clk_hw
devices to process, thus eliminating many duplicate implementations.

Signed-off-by: Jeffrey Hugo 
Suggested-by: Stephen Boyd 
Reviewed-by: Vinod Koul 
Tested-by: Vinod Koul 
Signed-off-by: Stephen Boyd

clk: qcom: Update SPDX headers for common files

2018-07-25T16:23:33+00:00

SPDX headers updated for common/branch/pll/regmap files.

Signed-off-by: Taniya Das 
Signed-off-by: Stephen Boyd

clk: qcom: add parent map for regmap mux

2017-12-22T00:03:22+00:00

Currently the driver assumes the register configuration value
is identical to its index in the parent map. This patch adds
the parent map field in regmap mux clock node which contains
the mapping of parent index with actual register configuration
value. If regmap node contains this parent map then the
configuration value will be taken from this
parent map instead of simply writing the index value.

Signed-off-by: Abhishek Sahu 
Signed-off-by: Stephen Boyd

clk: qcom: Add rcg ops to return floor value closest to the requested rate

2016-11-23T19:00:05+00:00

The default behaviour with clk_rcg2_ops is for the
clk_round_rate()/clk_set_rate() to return/set a ceil clock
rate closest to the requested rate by looking up the corresponding
frequency table.
However, we do have some instances (mainly sdcc on various platforms)
of clients expecting a clk_set_rate() to set a floor value instead.
Add a new clk_rcg2_floor_ops to handle this for such specific
rcg instances

Signed-off-by: Rajendra Nayak 
Signed-off-by: Ritesh Harjani 
Signed-off-by: Stephen Boyd