linux.git/drivers/clk/qcom/Makefile, branch v4.20

Merge branches 'clk-imx6-mmdc', 'clk-qcom-krait', 'clk-rockchip' and 'clk-smp2s11-match' into clk-next

2018-10-18T22:44:01+00:00

  - iMX6 MMDC clks
  - Qualcomm Krait CPU clk support

* clk-imx6-mmdc:
  clk: imx6q: add mmdc0 ipg clock
  clk: imx6sl: add mmdc ipg clocks
  clk: imx6sll: add mmdc1 ipg clock
  clk: imx6sx: add mmdc1 ipg clock
  clk: imx6ul: add mmdc1 ipg clock

* clk-qcom-krait:
  clk: qcom: Add safe switch hook for krait mux clocks
  dt-bindings: clock: Document qcom,krait-cc
  clk: qcom: Add Krait clock controller driver
  dt-bindings: arm: Document qcom,kpss-gcc
  clk: qcom: Add KPSS ACC/GCC driver
  clk: qcom: Add support for Krait clocks
  clk: qcom: Add IPQ806X's HFPLLs
  clk: qcom: Add MSM8960/APQ8064's HFPLLs
  dt-bindings: clock: Document qcom,hfpll
  clk: qcom: Add HFPLL driver
  clk: qcom: Add support for High-Frequency PLLs (HFPLLs)
  ARM: Add Krait L2 register accessor functions

* clk-rockchip:
  clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent call
  clk: rockchip: use the newly added clock-id for hdmi on RK3066
  clk: rockchip: add clock-id for HCLK_HDMI on rk3066
  clk: rockchip: fix wrong mmc sample phase shift for rk3328
  clk: rockchip: improve rk3288 pll rates for better hdmi output

* clk-smp2s11-match:
  clk: s2mps11: Add used attribute to s2mps11_dt_match
  clk: s2mps11: Fix matching when built as module and DT node contains compatible

Merge branch 'clk-qcom-qcs404' into clk-next

2018-10-18T22:42:42+00:00

 - Qualcomm QCS404 GCC support

* clk-qcom-qcs404:
  clk: qcom: gcc: Add global clock controller driver for QCS404
  clk: qcom: Export clk_alpha_pll_configure()

Merge branch 'clk-qcom-sdm660' into clk-next

2018-10-18T22:41:51+00:00

 - Qualcomm SDM660 GCC support

* clk-qcom-sdm660:
  clk: qcom: gcc-sdm660: Add MODULE_LICENSE
  clk: qcom: Add Global Clock controller (GCC) driver for SDM660

clk: qcom: Add Krait clock controller driver

2018-10-17T20:14:59+00:00

The Krait CPU clocks are made up of a primary mux and secondary
mux for each CPU and the L2, controlled via cp15 accessors. For
Kraits within KPSSv1 each secondary mux accepts a different aux
source, but on KPSSv2 each secondary mux accepts the same aux
source.

Cc: 
Signed-off-by: Stephen Boyd 
Signed-off-by: Sricharan R 
Tested-by: Craig Tatlor 
Signed-off-by: Stephen Boyd

clk: qcom: Add KPSS ACC/GCC driver

2018-10-17T20:14:54+00:00

The ACC and GCC regions present in KPSSv1 contain registers to
control clocks and power to each Krait CPU and L2. For CPUfreq
purposes probe these devices and expose a mux clock that chooses
between PXO and PLL8.

Cc: 
Signed-off-by: Stephen Boyd 
Signed-off-by: Sricharan R 
Tested-by: Craig Tatlor 
Signed-off-by: Stephen Boyd

clk: qcom: Add support for Krait clocks

2018-10-17T20:14:49+00:00

The Krait clocks are made up of a series of muxes and a divider
that choose between a fixed rate clock and dedicated HFPLLs for
each CPU. Instead of using mmio accesses to remux parents, the
Krait implementation exposes the remux control via cp15
registers. Support these clocks.

Signed-off-by: Stephen Boyd 
Signed-off-by: Sricharan R 
Tested-by: Craig Tatlor 
[sboyd@kernel.org: Move hidden config to top outside of the visible qcom
config zone so that menuconfig looks nice]
Signed-off-by: Stephen Boyd

clk: qcom: Add HFPLL driver

2018-10-17T20:14:40+00:00

On some devices (MSM8974 for example), the HFPLLs are
instantiated within the Krait processor subsystem as separate
register regions. Add a driver for these PLLs so that we can
provide HFPLL clocks for use by the system.

Cc: 
Signed-off-by: Stephen Boyd 
Signed-off-by: Sricharan R 
Tested-by: Craig Tatlor 
Signed-off-by: Stephen Boyd

clk: qcom: Add support for High-Frequency PLLs (HFPLLs)

2018-10-17T20:14:37+00:00

HFPLLs are the main frequency source for Krait CPU clocks. Add
support for changing the rate of these PLLs.

Signed-off-by: Stephen Boyd 
Signed-off-by: Sricharan R 
Tested-by: Craig Tatlor 
Signed-off-by: Stephen Boyd

clk: qcom: gcc: Add global clock controller driver for QCS404

2018-10-16T22:13:54+00:00

Add the clocks supported in global clock controller which clock the
peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks
to the clock framework for the clients to be able to request for them.

Signed-off-by: Shefali Jain 
Signed-off-by: Taniya Das 
Co-developed-by: Taniya Das 
Signed-off-by: Anu Ramanathan 
[bamse, vkoul: rebase and tidyup for upstream]
Signed-off-by: Bjorn Andersson 
Signed-off-by: Vinod Koul 
Acked-by: Rob Herring 
[sboyd@kernel.org: Lowercase hex]
Signed-off-by: Stephen Boyd

clk: qcom: Add Global Clock controller (GCC) driver for SDM660

2018-10-16T22:06:43+00:00

Add support for the global clock controller found on SDM660
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Based on CAF implementation.

Signed-off-by: Taniya Das 
[craig: rename parents to fit upstream, and other cleanups]
Signed-off-by: Craig Tatlor 
Acked-by: Rob Herring 
[sboyd@kernel.org: Rename gcc_660 to gcc_sdm660 and fix numbering of
defines to avoid duplicates]
Signed-off-by: Stephen Boyd