linux.git/drivers/clk/imx, branch v6.8

clk: imx: pll14xx: change naming of fvco to fout

2023-12-21T13:00:00+00:00

pll14xx_calc_rate() output the fout clock not the fvco clock
The relation of fvco and fout is:
	fout = fvco / (1 << sdiv)

So use correct naming for the clock.

Signed-off-by: Shengjiu Wang 
Reviewed-by: Peng Fan 
Reviewed-by: Marco Felsch 
Link: https://lore.kernel.org/r/1703068389-6130-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Abel Vesa

clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks

2023-12-20T09:32:19+00:00

To be compatible with SCU firmware based on 1.15 a different clock
routing for LVDS is needed.

Signed-off-by: Oliver F. Brown 
Signed-off-by: Ranjani Vaidyanathan 
Signed-off-by: Alexander Stein 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20231218122407.2757175-1-alexander.stein@ew.tq-group.com/
Signed-off-by: Abel Vesa

clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()

2023-12-20T09:32:18+00:00

In cases where imx_clk_is_resource_owned() returns false, the code path
does not handle the failure gracefully, potentially leading to a memory
leak. This fix ensures proper cleanup by freeing the allocated memory
for 'clk_node' before returning.

Signed-off-by: Kuan-Wei Chiu 
Reviewed-by: Peng Fan 
Link: https://lore.kernel.org/all/20231210171907.3410922-1-visitorckw@gmail.com/
Signed-off-by: Abel Vesa

clk: imx: imx8qm/qxp: add more resources to whitelist

2023-10-04T12:44:19+00:00

Add CAN_1/2 support for i.MX8QM
Add M4_0, PI_0_PWM_0 and PI_0_I2C_0 for i.MX8QXP

Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-7-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx: scu: ignore clks not owned by Cortex-A partition

2023-10-04T12:44:14+00:00

Not register clks that not owned to current partition.
CPU resources are specical resources, it is assigned in ATF, not
non-secure OS, but we still need to allow cpu freq, so return
true for non-secure OS for cpu resources.

Otherwise there will be error log if the resources are owned by current
partition:
[   19.387291] cm40_i2c_div: failed to attached the power domain -2
[   19.389305] cm40_lpuart_div: failed to attached the power domain -2

Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-6-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx8: remove MLB support

2023-10-04T12:44:11+00:00

MLB was de-featured, so drop MLB clk for i.MX8QM/QXP/DXL

Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-5-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx: imx8qm-rsrc: drop VPU_UART/VPUCORE

2023-10-04T12:44:07+00:00

IMX_SC_R_VPU_UART and IMX_SC_R_VPUCORE was used in i.MX8QM A0 which
not for mass production. i.MX8QM B0 not have the two resources, so drop
it.

Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-4-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx: imx8qxp: correct the enet clocks for i.MX8DXL

2023-10-04T12:44:04+00:00

The SC_PM_CLK_MISC0 clock is not available for the resources of ENET0/1 on
i.MX8DXL. Using the clock device compatible string to identify the platform
and only initialize the enetX_rgmii_rx_clk clock for non i.MX8DXL platform.

Signed-off-by: Shenwei Wang 
Reviewed-by: Ranjani Vaidyanathan 
Reviewed-by: Jacky Bai 
Acked-by: Jason Liu 
Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-3-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx: imx8qxp: Fix elcdif_pll clock

2023-10-04T12:43:59+00:00

Move the elcdif_pll clock initialization before the lcd_clk, since the
elcdif_clk needs to be initialized ahead of lcd_clk, being its parent.
This change fixes issues with the LCD clocks during suspend/resume.

Fixes: babfaa9556d7 ("clk: imx: scu: add more scu clocks")
Suggested-by: Ranjani Vaidyanathan 
Acked-by: Laurentiu Palcu 
Signed-off-by: Robert Chiras 
Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-2-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx: imx8dxl-rsrc: keep sorted in the ascending order

2023-10-04T12:43:51+00:00

Entries in imx8dxl_clk_scu_rsrc_table must be kept in the ascending
order, and IMX_SC_R_M4_0_UART < IMX_SC_R_M4_0_I2C.

Fixes: 036a4b4b4dfa ("clk: imx: Add imx8dxl clk driver")
Signed-off-by: Viorel Suman 
Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-1-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa