linux.git/drivers/clk/imx, branch v6.7

clk: imx: imx8qm/qxp: add more resources to whitelist

2023-10-04T12:44:19+00:00

Add CAN_1/2 support for i.MX8QM
Add M4_0, PI_0_PWM_0 and PI_0_I2C_0 for i.MX8QXP

Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-7-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx: scu: ignore clks not owned by Cortex-A partition

2023-10-04T12:44:14+00:00

Not register clks that not owned to current partition.
CPU resources are specical resources, it is assigned in ATF, not
non-secure OS, but we still need to allow cpu freq, so return
true for non-secure OS for cpu resources.

Otherwise there will be error log if the resources are owned by current
partition:
[   19.387291] cm40_i2c_div: failed to attached the power domain -2
[   19.389305] cm40_lpuart_div: failed to attached the power domain -2

Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-6-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx8: remove MLB support

2023-10-04T12:44:11+00:00

MLB was de-featured, so drop MLB clk for i.MX8QM/QXP/DXL

Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-5-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx: imx8qm-rsrc: drop VPU_UART/VPUCORE

2023-10-04T12:44:07+00:00

IMX_SC_R_VPU_UART and IMX_SC_R_VPUCORE was used in i.MX8QM A0 which
not for mass production. i.MX8QM B0 not have the two resources, so drop
it.

Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-4-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx: imx8qxp: correct the enet clocks for i.MX8DXL

2023-10-04T12:44:04+00:00

The SC_PM_CLK_MISC0 clock is not available for the resources of ENET0/1 on
i.MX8DXL. Using the clock device compatible string to identify the platform
and only initialize the enetX_rgmii_rx_clk clock for non i.MX8DXL platform.

Signed-off-by: Shenwei Wang 
Reviewed-by: Ranjani Vaidyanathan 
Reviewed-by: Jacky Bai 
Acked-by: Jason Liu 
Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-3-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx: imx8qxp: Fix elcdif_pll clock

2023-10-04T12:43:59+00:00

Move the elcdif_pll clock initialization before the lcd_clk, since the
elcdif_clk needs to be initialized ahead of lcd_clk, being its parent.
This change fixes issues with the LCD clocks during suspend/resume.

Fixes: babfaa9556d7 ("clk: imx: scu: add more scu clocks")
Suggested-by: Ranjani Vaidyanathan 
Acked-by: Laurentiu Palcu 
Signed-off-by: Robert Chiras 
Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-2-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx: imx8dxl-rsrc: keep sorted in the ascending order

2023-10-04T12:43:51+00:00

Entries in imx8dxl_clk_scu_rsrc_table must be kept in the ascending
order, and IMX_SC_R_M4_0_UART < IMX_SC_R_M4_0_I2C.

Fixes: 036a4b4b4dfa ("clk: imx: Add imx8dxl clk driver")
Signed-off-by: Viorel Suman 
Signed-off-by: Peng Fan 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230912-imx8-clk-v1-v1-1-69a34bcfcae1@nxp.com
Signed-off-by: Abel Vesa

clk: imx: imx6sx: Allow a different LCDIF1 clock parent

2023-10-04T12:33:47+00:00

It is not a good idea to hardcode the LCDIF1 parent inside the
clock driver because some users may want to use a different clock
parent for LCDIF1. One of the reasons could be related to EMI tests.

Remove the harcoded LCDIF1 parent when the LCDIF1 parent is described
via devicetree.

Old dtb's that do not describe the LCDIF1 parent via devicetree will
use the same PLL5 clock as parent to keep the original behavior.

Signed-off-by: Fabio Estevam 
Reviewed-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230815130923.775117-1-festevam@gmail.com
Signed-off-by: Abel Vesa

clk: imx: imx8mq: correct error handling path

2023-10-04T08:35:56+00:00

Avoid memory leak in error handling path. It does not make
much sense for the SoC without clk driver, to make program behavior
correct, let's fix it.

Fixes: b80522040cd3 ("clk: imx: Add clock driver for i.MX8MQ CCM")
Reported-by: kernel test robot 
Reported-by: Dan Carpenter 
Closes: https://lore.kernel.org/r/202309240551.e46NllPa-lkp@intel.com/
Signed-off-by: Peng Fan 
Link: https://lore.kernel.org/r/20231001122618.194498-1-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa

clk: imx: imx8: Simplify clk_imx_acm_detach_pm_domains()

2023-10-04T08:13:59+00:00

The return value of clk_imx_acm_detach_pm_domains() is never used.
Simplify the code and turn it into a void function.

Reviewed-by: Peng Fan 
Signed-off-by: Christophe JAILLET 
Signed-off-by: Abel Vesa