linux.git/drivers/clk/imx, branch v5.12

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2021-02-22T17:45:23+00:00

Pull clk updates from Stephen Boyd:
 "This is all driver updates, the majority of which is a bunch of new
  Qualcomm clk drivers that dominate the diffstat because we add support
  for six SoCs from that particular vendor.

  The other big change is the removal of various clk drivers that are no
  longer used now that the kernel is dropping support for those SoCs.

  Beyond that there's the usual non-critical fixes for existing drivers
  and a good number of patches from Lee Jones that cleanup a bunch of
  W=1 enabled builds.

  Removed Drivers:
   - Remove efm32 clk driver
   - Remove tango4 clk driver
   - Remove zte zx clk driver
   - Remove sirf prima2/atlast clk drivers
   - Remove u300 clk driver

  New Drivers:
   - PLL support on MStar/SigmaStar ARMv7 SoCs
   - CPU clks for Qualcomm SDX55
   - GCC and RPMh clks for Qualcomm SC8180x and SC7280 SoCs
   - GCC clks for Qualcomm SM8350
   - GPU clks for Qualcomm SDM660/SDM630

  Updates:
   - Video clk fixups on Qualcomm SM8250
   - Improvements for multimedia clks on Qualcomm MSM8998
   - Fix many warnings with W=1 enabled builds under drivers/clk/
   - Support crystal load capacitance for Versaclock VC5
   - Add a "skip recall" DT binding for Silicon Labs' si570 to avoid
     glitches at boot
   - Convert Xilinx VCU clk driver to a proper clk provider driver
   - Expose Xilinx ZynqMP clk driver to more platforms
   - Amlogic pll driver fixup
   - Amlogic meson8b clock controller dt support clean up
   - Remove mipi clk from the Amlogic axg clock controller
   - New Rockchip rk3368 clock ids related to camera input
   - Use pr_notice() instead of pr_warn() on i.MX6Q pre-boot ldb_di_clk
     reparenting
   - A series from Liu Ying that adds some SCU clocks support for
     i.MX8qxp DC0/MIPI-LVDS subsystems
   - A series from Lucas Stach that adds PLL monitor clocks for i.MX8MQ,
     and clkout1/2 support for i.MX8MM/MN
   - Add I2c and Ethernet (RAVB) clocks on Renesas R-Car V3U
   - Add timer (TMU) clocks on most Renesas R-Car Gen3 SoCs
   - Add video-related (FCPVD/VSPD/VSPX), watchdog (RWDT), serial
     (HSCIF), pincontrol/GPIO (PFC/GPIO), SPI (MSIOF), SDHI, and DMA
     (SYS-DMAC) clocks on Renesas R-Car V3U
   - Add support for the USB 2.0 clock selector on Renesas RZ/G2 SoCs
   - Allwinner H616 SoC clk support"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (171 commits)
  clk: mstar: msc313-mpll: Fix format specifier
  clk: mstar: Allow MStar clk drivers to be compile tested
  clk: qoriq: use macros to generate pll_mask
  clk: qcom: Add Global Clock controller (GCC) driver for SC7280
  dt-bindings: clock: Add SC7280 GCC clock binding
  clk: qcom: rpmh: Add support for RPMH clocks on SC7280
  dt-bindings: clock: Add RPMHCC bindings for SC7280
  clk: qcom: gcc-sm8350: add gdsc
  dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings
  clk: qcom: Add SDM660 GPU Clock Controller (GPUCC) driver
  clk: qcom: mmcc-msm8996: Migrate gfx3d clock to clk_rcg2_gfx3d
  clk: qcom: rcg2: Stop hardcoding gfx3d pingpong parent numbers
  dt-bindings: clock: Add support for the SDM630 and SDM660 mmcc
  clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver
  clk: qcom: gcc-sdm660: Mark GPU CFG AHB clock as critical
  clk: qcom: gcc-sdm660: Mark MMSS NoC CFG AHB clock as critical
  clk: qcom: gpucc-msm8998: Allow fabia gpupll0 rate setting
  clk: qcom: gpucc-msm8998: Add resets, cxc, fix flags on gpu_gx_gdsc
  clk: qcom: gdsc: Implement NO_RET_PERIPH flag
  clk: mstar: MStar/SigmaStar MPLL driver
  ...

clk: imx: Move 'imx6sl_set_wait_clk()'s prototype out to accessible header

2021-01-30T14:13:23+00:00

Fixes the following W=1 kernel build warning(s):

 drivers/clk/imx/clk-imx6sl.c:156:6: warning: no previous prototype for ‘imx6sl_set_wait_clk’ [-Wmissing-prototypes]

Cc: Russell King 
Cc: Shawn Guo 
Cc: Sascha Hauer 
Cc: Pengutronix Kernel Team 
Cc: Fabio Estevam 
Cc: NXP Linux Team 
Cc: Ahmad Fatoum 
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Lee Jones 
Signed-off-by: Shawn Guo

clk: imx8mn: add clkout1/2 support

2021-01-30T13:35:33+00:00

clkout1 and clkout2 allow to supply clocks from the SoC to the board,
which is used by some board designs to provide reference clocks.

Signed-off-by: Lucas Stach 
Reviewed-by: Abel Vesa 
Signed-off-by: Shawn Guo

clk: imx8mm: add clkout1/2 support

2021-01-30T13:35:30+00:00

clkout1 and clkout2 allow to supply clocks from the SoC to the board,
which is used by some board designs to provide reference clocks.

Signed-off-by: Lucas Stach 
Reviewed-by: Abel Vesa 
Signed-off-by: Shawn Guo

clk: imx8mq: add PLL monitor output

2021-01-30T13:35:15+00:00

The PLL monitor is mentioned as a debug feature in the reference manual,
but there are some boards that use this clock output as a reference clock
for board level components. Add support for those clocks in the clock
driver, so this clock output can be used properly.

Note that the VIDEO1, GPU and VPU mux inputs are rotated compared to the
description in the reference manual. The order in this patch has been
empirically validated.

Signed-off-by: Lucas Stach 
Reviewed-by: Abel Vesa 
Signed-off-by: Shawn Guo

clk: imx: clk-imx31: Remove unused static const table 'uart_clks'

2021-01-29T13:31:52+00:00

Fixes the following W=1 kernel build warning(s):

 drivers/clk/imx/clk-imx31.c:54:28: warning: ‘uart_clks’ defined but not used [-Wunused-const-variable=]

Cc: Michael Turquette 
Cc: Stephen Boyd 
Cc: Shawn Guo 
Cc: Sascha Hauer 
Cc: Pengutronix Kernel Team 
Cc: Fabio Estevam 
Cc: NXP Linux Team 
Cc: Arnd Bergmann 
Cc: linux-clk@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Lee Jones 
Signed-off-by: Shawn Guo

clk: imx6q: demote warning about pre-boot ldb_di_clk reparenting

2021-01-29T08:23:34+00:00

Since 5d283b083800 ("clk: imx6: Fix procedure to switch the parent
of LDB_DI_CLK"), the clock driver warns if ldb_di\d_sel is changed
from reset value on system boot. This warning is printed even if
the bootloader (or a previous kernel that did kexec) followed the
correct procedure for glitch-free reparenting.

As such systems are doing everything correctly, a warning is too
harsh. Demote to a notice, so users are still alerted, but without
cluttering a loglevel=5 boot.

While at it, add the words "possible glitch" into the log message, to
make it more user-friendly.

Signed-off-by: Ahmad Fatoum 
Reviewed-by: Fabio Estevam 
Signed-off-by: Shawn Guo

clk: imx: fix Kconfig warning for i.MX SCU clk

2021-01-12T19:25:54+00:00

A previous patch introduced a harmless randconfig warning:

WARNING: unmet direct dependencies detected for MXC_CLK_SCU
  Depends on [n]: COMMON_CLK [=y] && ARCH_MXC [=n] && IMX_SCU [=y] && HAVE_ARM_SMCCC [=y]
  Selected by [m]:
  - CLK_IMX8QXP [=m] && COMMON_CLK [=y] && (ARCH_MXC [=n] && ARM64 [=y] || COMPILE_TEST [=y]) && IMX_SCU [=y] && HAVE_ARM_SMCCC [=y]

Since the symbol is now hidden and only selected by other symbols,
just remove the dependencies and require the other drivers to
get it right.

Fixes: 6247e31b7530 ("clk: imx: scu: fix MXC_CLK_SCU module build break")
Reported-by: Anders Roxell 
Signed-off-by: Arnd Bergmann 
Link: https://lore.kernel.org/r/20201230155244.981757-1-arnd@kernel.org
Signed-off-by: Stephen Boyd

clk: imx: clk-imx8qxp: Add some SCU clocks support for MIPI-LVDS subsystems

2021-01-05T02:55:12+00:00

This patch adds some SCU clocks support for i.MX8qxp MIPI-LVDS subsystems.

Cc: Michael Turquette 
Cc: Stephen Boyd 
Cc: Shawn Guo 
Cc: Sascha Hauer 
Cc: Pengutronix Kernel Team 
Cc: Fabio Estevam 
Cc: NXP Linux Team 
Cc: Dong Aisheng 
Signed-off-by: Liu Ying 
Signed-off-by: Shawn Guo

clk: imx: clk-imx8qxp: Register DC0 display clocks with imx_clk_scu2()

2021-01-05T02:55:08+00:00

This patch corrects display clocks for i.MX8qxp DC0 subsystem by
calling imx_clk_scu2() to register them, instead of calling
imx_clk_scu().  The reason is that the clocks can source from
various parents.  The clock source selection is controlled by
Distributed Slave System Controller(DSC).  According to the DSC spec,
the below table describes the generic source selections for clocks
with the same type in various subsystems.  And, the display controller
subsystem spec says the display clocks can source from PLL1, PLL2 or
bypass clock, thus we may specify the correct parents for imx_clk_scu2().

The bypass clock's parent is determined by the SCU firmware.
Currently, the parent is 'pixel_link_clk_in' from HW point of view.
To be more specific, the parent is dummy for i.MX8qxp DC0, while
HDMI TX PHY PLL for i.MX8qm DC0.  In practice, the display clocks
source from the bypass clock only when driving i.MX8qm HDMI TX.
So, for the both display clocks, we simply specify 'dc0_bypass0_clk'
bypass clock as a valid parent.

 -----------------------------------------
| src_sel[28:26] |                        |
 -----------------------------------------
| 0x0            | xtal24M                |
| 0x1            | PLL0                   |
| 0x2            | PLL1                   |
| 0x3            | PLL2                   |
| 0x4            | bypass reference clock |
| 0x5 to 0x7     | reserved               |
 -----------------------------------------

Cc: Michael Turquette 
Cc: Stephen Boyd 
Cc: Shawn Guo 
Cc: Sascha Hauer 
Cc: Pengutronix Kernel Team 
Cc: Fabio Estevam 
Cc: NXP Linux Team 
Cc: Dong Aisheng 
Signed-off-by: Liu Ying 
Signed-off-by: Shawn Guo