<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/clk/Makefile, branch v4.12</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>clk: hi6220: Add the hi655x's pmic clock</title>
<updated>2017-04-22T02:18:53+00:00</updated>
<author>
<name>Daniel Lezcano</name>
<email>daniel.lezcano@linaro.org</email>
</author>
<published>2017-04-17T17:19:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b68adc23bc3d0c81a08b69cf1ba0bf0405c9d868'/>
<id>b68adc23bc3d0c81a08b69cf1ba0bf0405c9d868</id>
<content type='text'>
The hi655x multi function device is a PMIC providing regulators.

The PMIC also provides a clock for the WiFi and the Bluetooth, let's implement
this clock in order to add it in the hi655x MFD and allow proper wireless
initialization.

Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
[sboyd@codeaurora.org: Remove clkdev usage]
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The hi655x multi function device is a PMIC providing regulators.

The PMIC also provides a clock for the WiFi and the Bluetooth, let's implement
this clock in order to add it in the hi655x MFD and allow proper wireless
initialization.

Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
[sboyd@codeaurora.org: Remove clkdev usage]
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: Make x86/ conditional on CONFIG_COMMON_CLK</title>
<updated>2017-01-27T00:20:07+00:00</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2017-01-23T18:07:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f35b6542c3ac3f28056d298348a81f7d56d3a041'/>
<id>f35b6542c3ac3f28056d298348a81f7d56d3a041</id>
<content type='text'>
Fix Makefile for x86 support, dependency on CONFIG_COMMON_CLK
was not explicit

Fixes: 701190fd7419 ('clk: x86: add support for Lynxpoint LPSS clocks')
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Acked-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix Makefile for x86 support, dependency on CONFIG_COMMON_CLK
was not explicit

Fixes: 701190fd7419 ('clk: x86: add support for Lynxpoint LPSS clocks')
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Acked-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: vc5: Add support for IDT VersaClock 5P49V5923 and 5P49V5933</title>
<updated>2017-01-21T00:17:34+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut@gmail.com</email>
</author>
<published>2017-01-12T01:03:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3e1aec4e2c415346df7d5429f7413837ddaaedd7'/>
<id>3e1aec4e2c415346df7d5429f7413837ddaaedd7</id>
<content type='text'>
Add driver for IDT VersaClock 5 5P49V5923 and 5P49V5933 chips. These
chips have two clock inputs, XTAL or CLK, which are muxed into single
PLL/VCO input. In case of 5P49V5923, the XTAL in built into the chip
while the 5P49V5923 requires external XTAL.

The PLL feeds two fractional dividers. Each fractional divider feeds
output mux, which allows selecting between clock from the fractional
divider itself or from output mux on output N-1. In case of output
mux 0, the output N-1 is instead connected to the output from the mux
feeding the PLL.

The driver thus far supports only the 5P49V5923 and 5P49V5933, while
it should be easily extensible to the whole 5P49V59xx family of chips
as they are all pretty similar.

Signed-off-by: Marek Vasut &lt;marek.vasut@gmail.com&gt;
Cc: Michael Turquette &lt;mturquette@baylibre.com&gt;
Reviewed-by: Laurent Pinchart &lt;laurent.pinchart+renesas@ideasonboard.com&gt;
Tested-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Cc: linux-renesas-soc@vger.kernel.org
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add driver for IDT VersaClock 5 5P49V5923 and 5P49V5933 chips. These
chips have two clock inputs, XTAL or CLK, which are muxed into single
PLL/VCO input. In case of 5P49V5923, the XTAL in built into the chip
while the 5P49V5923 requires external XTAL.

The PLL feeds two fractional dividers. Each fractional divider feeds
output mux, which allows selecting between clock from the fractional
divider itself or from output mux on output N-1. In case of output
mux 0, the output N-1 is instead connected to the output from the mux
feeding the PLL.

The driver thus far supports only the 5P49V5923 and 5P49V5933, while
it should be easily extensible to the whole 5P49V59xx family of chips
as they are all pretty similar.

Signed-off-by: Marek Vasut &lt;marek.vasut@gmail.com&gt;
Cc: Michael Turquette &lt;mturquette@baylibre.com&gt;
Reviewed-by: Laurent Pinchart &lt;laurent.pinchart+renesas@ideasonboard.com&gt;
Tested-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Cc: linux-renesas-soc@vger.kernel.org
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: Loongson1: Refactor Loongson1 clock</title>
<updated>2016-09-23T21:48:56+00:00</updated>
<author>
<name>Kelvin Cheung</name>
<email>keguang.zhang@gmail.com</email>
</author>
<published>2016-09-19T04:38:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a8e3ced421c1cd24221543a2bfda3134d46a6f21'/>
<id>a8e3ced421c1cd24221543a2bfda3134d46a6f21</id>
<content type='text'>
Factor out the common functions into loongson1/clk.c
to support both Loongson1B and Loongson1C. And, put
the rest into loongson1/clk-loongson1b.c.

Signed-off-by: Kelvin Cheung &lt;keguang.zhang@gmail.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Factor out the common functions into loongson1/clk.c
to support both Loongson1B and Loongson1C. And, put
the rest into loongson1/clk-loongson1b.c.

Signed-off-by: Kelvin Cheung &lt;keguang.zhang@gmail.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: uniphier: add core support code for UniPhier clock driver</title>
<updated>2016-09-16T23:31:33+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-09-16T07:40:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=734d82f4a678e897a3197b3e61313e32c9e77f46'/>
<id>734d82f4a678e897a3197b3e61313e32c9e77f46</id>
<content type='text'>
This includes UniPhier clock driver code, except SoC-specific
data arrays.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This includes UniPhier clock driver code, except SoC-specific
data arrays.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: max77686: Combine Maxim max77686 and max77802 driver</title>
<updated>2016-08-15T22:32:41+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2016-06-17T10:51:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8ad313fe4e0016bac5dc6a7fbb323b8551977bd9'/>
<id>8ad313fe4e0016bac5dc6a7fbb323b8551977bd9</id>
<content type='text'>
The clock IP used on the Maxim PMICs max77686 and max77802 are
same. The configuration of clock register is also same except
the number of clocks.

Part of common code utilisation, there is 3 files for these chips
clock driver, one for common and two files for driver registration.

Combine both drivers into single file and move common code into
same common file reduces the 2 files and make max77686 and max77802
clock driver in single fine. This driver does not depends on the
parent driver structure. The regmap handle is acquired through
regmap APIs for the register access.

This combination of driver helps on adding clock driver for different
Maxim PMICs which has similar clock IP like MAX77620 and MAX20024.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
CC: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
CC: Javier Martinez Canillas &lt;javier@dowhile0.org&gt;
Reviewed-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Tested-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Tested-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The clock IP used on the Maxim PMICs max77686 and max77802 are
same. The configuration of clock register is also same except
the number of clocks.

Part of common code utilisation, there is 3 files for these chips
clock driver, one for common and two files for driver registration.

Combine both drivers into single file and move common code into
same common file reduces the 2 files and make max77686 and max77802
clock driver in single fine. This driver does not depends on the
parent driver structure. The regmap handle is acquired through
regmap APIs for the register access.

This combination of driver helps on adding clock driver for different
Maxim PMICs which has similar clock IP like MAX77620 and MAX20024.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
CC: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
CC: Javier Martinez Canillas &lt;javier@dowhile0.org&gt;
Reviewed-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Tested-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Tested-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: Makefile: re-sort and clean up</title>
<updated>2016-07-19T16:53:52+00:00</updated>
<author>
<name>Michael Turquette</name>
<email>mturquette@baylibre.com</email>
</author>
<published>2016-06-16T00:09:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b328d2c110ad7b45af9cde2bce70803df28e9553'/>
<id>b328d2c110ad7b45af9cde2bce70803df28e9553</id>
<content type='text'>
Sorting is hard.

Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Sorting is hard.

Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'clk-sunxi-ng' into clk-next</title>
<updated>2016-07-09T01:08:56+00:00</updated>
<author>
<name>Michael Turquette</name>
<email>mturquette@baylibre.com</email>
</author>
<published>2016-07-09T01:08:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7adb76956189d10fd77f00b41b4d413480e94715'/>
<id>7adb76956189d10fd77f00b41b4d413480e94715</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi-ng: Add common infrastructure</title>
<updated>2016-07-09T01:04:32+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2016-06-29T19:05:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1d80c14248d6082c91a8a9e3d70cc94c3cc18ecb'/>
<id>1d80c14248d6082c91a8a9e3d70cc94c3cc18ecb</id>
<content type='text'>
Start our new clock infrastructure by adding the registration code, common
structure and common code.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
Link: lkml.kernel.org/r/20160629190535.11855-3-maxime.ripard@free-electrons.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Start our new clock infrastructure by adding the registration code, common
structure and common code.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
Link: lkml.kernel.org/r/20160629190535.11855-3-maxime.ripard@free-electrons.com
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: meson: only build selected platforms</title>
<updated>2016-06-23T01:02:52+00:00</updated>
<author>
<name>Michael Turquette</name>
<email>mturquette@baylibre.com</email>
</author>
<published>2016-05-23T21:29:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=cb7c47d7066ca9fda053f5cb327ea49e14f42409'/>
<id>cb7c47d7066ca9fda053f5cb327ea49e14f42409</id>
<content type='text'>
Break the AmLogic clock code up so that only the necessary parts are
compiled and linked. The core code is selected by both arm and arm64
builds with COMMON_CLK_AMLOGIC. The individual drivers have their own
config options as well.

Tested-by: Kevin Hilman &lt;khilman@baylibre.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Break the AmLogic clock code up so that only the necessary parts are
compiled and linked. The core code is selected by both arm and arm64
builds with COMMON_CLK_AMLOGIC. The individual drivers have their own
config options as well.

Tested-by: Kevin Hilman &lt;khilman@baylibre.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
