<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/clk/Kconfig, branch v3.11</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>clk: vexpress: Make the clock drivers directly available for arm64</title>
<updated>2013-06-20T07:02:25+00:00</updated>
<author>
<name>Pawel Moll</name>
<email>pawel.moll@arm.com</email>
</author>
<published>2013-06-10T15:05:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c7f6e2d8ffce43e753c930bcb8b2230a321843af'/>
<id>c7f6e2d8ffce43e753c930bcb8b2230a321843af</id>
<content type='text'>
The new arm64 architecture has no idea of platform or machine, so
it doesn't have to define ARCH_VEXPRESS configuration option at
all. To allow user to select the drivers at all, make it depend
on ARM64 as well.

Signed-off-by: Pawel Moll &lt;pawel.moll@arm.com&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The new arm64 architecture has no idea of platform or machine, so
it doesn't have to define ARCH_VEXPRESS configuration option at
all. To allow user to select the drivers at all, make it depend
on ARM64 as well.

Signed-off-by: Pawel Moll &lt;pawel.moll@arm.com&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: si5351: Allow to build without CONFIG_OF</title>
<updated>2013-05-29T05:53:22+00:00</updated>
<author>
<name>Sebastian Hesselbarth</name>
<email>sebastian.hesselbarth@gmail.com</email>
</author>
<published>2013-05-01T00:58:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4564dbdadc1814a9ee300b6d3c5b7179bc8a8c80'/>
<id>4564dbdadc1814a9ee300b6d3c5b7179bc8a8c80</id>
<content type='text'>
With of_clk_provider stubs for CONFIG_OF not set, we can now also enable
clk-si5351 on those architectures.

Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With of_clk_provider stubs for CONFIG_OF not set, we can now also enable
clk-si5351 on those architectures.

Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: add PowerPC corenet clock driver support</title>
<updated>2013-05-29T05:50:31+00:00</updated>
<author>
<name>Tang Yuantian</name>
<email>yuantian.tang@freescale.com</email>
</author>
<published>2013-04-09T08:46:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=555eae97358082be3a46572464829c27b96ed8f1'/>
<id>555eae97358082be3a46572464829c27b96ed8f1</id>
<content type='text'>
This adds the clock driver for Freescale PowerPC corenet
series SoCs using common clock infrastructure.

Signed-off-by: Tang Yuantian &lt;Yuantian.Tang@freescale.com&gt;
Signed-off-by: Li Yang &lt;leoli@freescale.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds the clock driver for Freescale PowerPC corenet
series SoCs using common clock infrastructure.

Signed-off-by: Tang Yuantian &lt;Yuantian.Tang@freescale.com&gt;
Signed-off-by: Li Yang &lt;leoli@freescale.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: si5351: make clk-si5351 depend on CONFIG_OF</title>
<updated>2013-04-16T04:42:56+00:00</updated>
<author>
<name>Sebastian Hesselbarth</name>
<email>sebastian.hesselbarth@gmail.com</email>
</author>
<published>2013-04-15T07:00:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=476ba5ffa412cc170aa20fd135648b8f14a4baef'/>
<id>476ba5ffa412cc170aa20fd135648b8f14a4baef</id>
<content type='text'>
Calling clk-si5351 driver non-OF ready was too early. This patch
makes clk-si5351 depend on CONFIG_OF again, until things get sorted out.

Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Reported-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
[mturquette@linaro.org: fixed spelling of Stephen's name]
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Calling clk-si5351 driver non-OF ready was too early. This patch
makes clk-si5351 depend on CONFIG_OF again, until things get sorted out.

Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Reported-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
[mturquette@linaro.org: fixed spelling of Stephen's name]
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: add si5351 i2c common clock driver</title>
<updated>2013-04-12T18:04:38+00:00</updated>
<author>
<name>Sebastian Hesselbarth</name>
<email>sebastian.hesselbarth@gmail.com</email>
</author>
<published>2013-04-11T19:42:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9abd5f0555df6cd36130feb742f1def6d99c60fe'/>
<id>9abd5f0555df6cd36130feb742f1def6d99c60fe</id>
<content type='text'>
This patch adds a common clock driver for Silicon Labs Si5351a/b/c
i2c programmable clock generators. Currently, the driver does not
support VXCO feature of si5351b. Passing platform_data or DT bindings
selectively allows to overwrite stored Si5351 configuration which is
very helpful for clock generators with empty eeprom configuration.
Corresponding device tree binding documentation is also added.

Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Tested-by: Daniel Mack &lt;zonque@gmail.com&gt;
Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Tested-by: Michal Bachraty &lt;michal.bachraty@streamunlimited.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds a common clock driver for Silicon Labs Si5351a/b/c
i2c programmable clock generators. Currently, the driver does not
support VXCO feature of si5351b. Passing platform_data or DT bindings
selectively allows to overwrite stored Si5351 configuration which is
very helpful for clock generators with empty eeprom configuration.
Corresponding device tree binding documentation is also added.

Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Tested-by: Daniel Mack &lt;zonque@gmail.com&gt;
Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Tested-by: Michal Bachraty &lt;michal.bachraty@streamunlimited.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: Add axi-clkgen driver</title>
<updated>2013-03-20T00:20:30+00:00</updated>
<author>
<name>Lars-Peter Clausen</name>
<email>lars@metafoo.de</email>
</author>
<published>2013-03-11T15:22:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0e646c52cf0ee186ec50b41c4db8cf81500c8dd1'/>
<id>0e646c52cf0ee186ec50b41c4db8cf81500c8dd1</id>
<content type='text'>
This driver adds support for the AXI clkgen pcore to the common clock framework.
The AXI clkgen pcore is a AXI front-end to the MMCM_ADV frequency synthesizer
commonly found in Xilinx FPGAs.

The AXI clkgen pcore is used in Analog Devices' reference designs targeting
Xilinx FPGAs.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This driver adds support for the AXI clkgen pcore to the common clock framework.
The AXI clkgen pcore is a AXI front-end to the MMCM_ADV frequency synthesizer
commonly found in Xilinx FPGAs.

The AXI clkgen pcore is used in Analog Devices' reference designs targeting
Xilinx FPGAs.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2012-12-14T22:54:26+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2012-12-14T22:54:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c2714334b944abbeaaadda8cddde619eff0292a1'/>
<id>c2714334b944abbeaaadda8cddde619eff0292a1</id>
<content type='text'>
Pull ARM SoC updates for Marvell mvebu/kirkwood from Olof Johansson:
 "This is a branch with updates for Marvell's mvebu/kirkwood platforms.
  They came in late-ish, and were heavily interdependent such that it
  didn't make sense to split them up across the cross-platform topic
  branches.  So here they are (for the second release in a row) in a
  branch on their own."

* tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (88 commits)
  arm: l2x0: add aurora related properties to OF binding
  arm: mvebu: add Aurora L2 Cache Controller to the DT
  arm: mvebu: add L2 cache support
  dma: mv_xor: fix error handling path
  dma: mv_xor: fix error checking of irq_of_parse_and_map()
  dma: mv_xor: use request_irq() instead of devm_request_irq()
  dma: mv_xor: clear the window override control registers
  arm: mvebu: fix address decoding armada_cfg_base() function
  ARM: mvebu: update defconfig with I2C and RTC support
  ARM: mvebu: Add SATA support for OpenBlocks AX3-4
  ARM: mvebu: Add support for the RTC in OpenBlocks AX3-4
  ARM: mvebu: Add support for I2C on OpenBlocks AX3-4
  ARM: mvebu: Add support for I2C controllers in Armada 370/XP
  arm: mvebu: Add hardware I/O Coherency support
  arm: plat-orion: Add coherency attribute when setup mbus target
  arm: dma mapping: Export a dma ops function arm_dma_set_mask
  arm: mvebu: Add SMP support for Armada XP
  arm: mm: Add support for PJ4B cpu and init routines
  arm: mvebu: Add IPI support via doorbells
  arm: mvebu: Add initial support for power managmement service unit
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC updates for Marvell mvebu/kirkwood from Olof Johansson:
 "This is a branch with updates for Marvell's mvebu/kirkwood platforms.
  They came in late-ish, and were heavily interdependent such that it
  didn't make sense to split them up across the cross-platform topic
  branches.  So here they are (for the second release in a row) in a
  branch on their own."

* tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (88 commits)
  arm: l2x0: add aurora related properties to OF binding
  arm: mvebu: add Aurora L2 Cache Controller to the DT
  arm: mvebu: add L2 cache support
  dma: mv_xor: fix error handling path
  dma: mv_xor: fix error checking of irq_of_parse_and_map()
  dma: mv_xor: use request_irq() instead of devm_request_irq()
  dma: mv_xor: clear the window override control registers
  arm: mvebu: fix address decoding armada_cfg_base() function
  ARM: mvebu: update defconfig with I2C and RTC support
  ARM: mvebu: Add SATA support for OpenBlocks AX3-4
  ARM: mvebu: Add support for the RTC in OpenBlocks AX3-4
  ARM: mvebu: Add support for I2C on OpenBlocks AX3-4
  ARM: mvebu: Add support for I2C controllers in Armada 370/XP
  arm: mvebu: Add hardware I/O Coherency support
  arm: plat-orion: Add coherency attribute when setup mbus target
  arm: dma mapping: Export a dma ops function arm_dma_set_mask
  arm: mvebu: Add SMP support for Armada XP
  arm: mm: Add support for PJ4B cpu and init routines
  arm: mvebu: Add IPI support via doorbells
  arm: mvebu: Add initial support for power managmement service unit
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: mvebu: add mvebu core clocks.</title>
<updated>2012-11-20T13:34:08+00:00</updated>
<author>
<name>Sebastian Hesselbarth</name>
<email>sebastian.hesselbarth@gmail.com</email>
</author>
<published>2012-11-17T14:22:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=97fa4cf442ff2872000d9110686371775795a32b'/>
<id>97fa4cf442ff2872000d9110686371775795a32b</id>
<content type='text'>
This driver allows to provide DT clocks for core clocks found on
Marvell Kirkwood, Dove &amp; 370/XP SoCs. The core clock frequencies and
ratios are determined by decoding the Sample-At-Reset registers.

Although technically correct, using a divider of 0 will lead to
div_by_zero panic. Let's use a ratio of 0/1 instead to fail later
with a zero clock.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Signed-off-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Tested-by Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This driver allows to provide DT clocks for core clocks found on
Marvell Kirkwood, Dove &amp; 370/XP SoCs. The core clock frequencies and
ratios are determined by decoding the Sample-At-Reset registers.

Although technically correct, using a divider of 0 will lead to
div_by_zero panic. Let's use a ratio of 0/1 instead to fail later
with a zero clock.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Signed-off-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Tested-by Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: Common clocks implementation for Versatile Express</title>
<updated>2012-10-29T18:08:03+00:00</updated>
<author>
<name>Pawel Moll</name>
<email>pawel.moll@arm.com</email>
</author>
<published>2012-09-18T14:17:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=bcd6f569e87471d7f104bd9497f0b516a3b12e32'/>
<id>bcd6f569e87471d7f104bd9497f0b516a3b12e32</id>
<content type='text'>
This patch adds a DT and non-DT based implementation of
the common clock infrastructure for Versatile Express
platform. It registers (statically or using DT) all
required fixed clocks, initialises motherboard's SP810
cell (that provides clocks for SP804 timers) and
explicitly registers VE "osc" driver, to make the
clock generators available early.

Signed-off-by: Pawel Moll &lt;pawel.moll@arm.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds a DT and non-DT based implementation of
the common clock infrastructure for Versatile Express
platform. It registers (statically or using DT) all
required fixed clocks, initialises motherboard's SP810
cell (that provides clocks for SP804 timers) and
explicitly registers VE "osc" driver, to make the
clock generators available early.

Signed-off-by: Pawel Moll &lt;pawel.moll@arm.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>CLK: clk-twl6040: Initial clock driver for OMAP4+ McPDM fclk clock</title>
<updated>2012-10-29T18:07:42+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@ti.com</email>
</author>
<published>2012-09-14T14:30:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f9f8c0438da2c6d6a4cd8af73097add3850d6084'/>
<id>f9f8c0438da2c6d6a4cd8af73097add3850d6084</id>
<content type='text'>
On OMAP4+ platforms the functional clock for the McPDM IP is suplied by
the twl6040 codec (bit clock on the PDM bus).
This common clock driver for twl6040 will register the mcpdm_fclk clock to
be used by the McPDM driver to make sure that the needed clocks are
available when needed.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@ti.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On OMAP4+ platforms the functional clock for the McPDM IP is suplied by
the twl6040 codec (bit clock on the PDM bus).
This common clock driver for twl6040 will register the mcpdm_fclk clock to
be used by the McPDM driver to make sure that the needed clocks are
available when needed.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@ti.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
