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<title>linux.git/drivers/bus/ti-sysc.c, branch v4.19</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge branch 'perm-fix' into omap-for-v4.19/fixes-v2</title>
<updated>2018-08-28T16:58:03+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2018-08-28T16:58:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ea4d65f14f6aaa53e379b93c5544245ef081b3e7'/>
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<pre>
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</entry>
<entry>
<title>bus: ti-sysc: Fix no_console_suspend handling</title>
<updated>2018-08-22T15:04:49+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2018-08-08T08:07:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4f3530f4a41d49c41015020cd9a5ed5c95b5d2db'/>
<id>4f3530f4a41d49c41015020cd9a5ed5c95b5d2db</id>
<content type='text'>
If no_console_suspend is set, we should keep console enabled during suspend.
Lets fix this by only producing a warning if we can't idle hardware during
suspend.

Fixes: ef55f8215a78 ("bus: ti-sysc: Improve suspend and resume handling")
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
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<pre>
If no_console_suspend is set, we should keep console enabled during suspend.
Lets fix this by only producing a warning if we can't idle hardware during
suspend.

Fixes: ef55f8215a78 ("bus: ti-sysc: Improve suspend and resume handling")
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</pre>
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</entry>
<entry>
<title>bus: ti-sysc: Fix module register ioremap for larger offsets</title>
<updated>2018-08-17T14:22:56+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2018-08-08T08:07:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0ef8e3bb974af56346b34393e643d491d9141c66'/>
<id>0ef8e3bb974af56346b34393e643d491d9141c66</id>
<content type='text'>
We can have the interconnect target module control registers pretty
much anywhere within the module range. The current code attempts an
incomplete optimization of the ioremap size but does it wrong and
it only works for registers at the beginning of the module.

Let's just use the largest control register to calculate the ioremap
size. The ioremapped range is for most part cached anyways so there
is no need for size optimization. Let's also update the comments
accordingly.

Fixes: 0eecc636e5a2 ("bus: ti-sysc: Add minimal TI sysc interconnect
target driver")
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
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<pre>
We can have the interconnect target module control registers pretty
much anywhere within the module range. The current code attempts an
incomplete optimization of the ioremap size but does it wrong and
it only works for registers at the beginning of the module.

Let's just use the largest control register to calculate the ioremap
size. The ioremapped range is for most part cached anyways so there
is no need for size optimization. Let's also update the comments
accordingly.

Fixes: 0eecc636e5a2 ("bus: ti-sysc: Add minimal TI sysc interconnect
target driver")
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>bus: ti-sysc: Add support for software reset</title>
<updated>2018-07-10T05:31:38+00:00</updated>
<author>
<name>Faiz Abbas</name>
<email>faiz_abbas@ti.com</email>
</author>
<published>2018-07-09T16:48:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=596e7955692b5d8b042fca500b7a83c25dfcf936'/>
<id>596e7955692b5d8b042fca500b7a83c25dfcf936</id>
<content type='text'>
Add support for the software reset of a target interconnect
module using its sysconfig and sysstatus registers.

Signed-off-by: Faiz Abbas &lt;faiz_abbas@ti.com&gt;
[tony@atomide.com: updated to check if sysconfig exists]
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
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<pre>
Add support for the software reset of a target interconnect
module using its sysconfig and sysstatus registers.

Signed-off-by: Faiz Abbas &lt;faiz_abbas@ti.com&gt;
[tony@atomide.com: updated to check if sysconfig exists]
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>bus: ti-sysc: Add support for using ti-sysc for MCAN on dra76x</title>
<updated>2018-07-10T05:31:27+00:00</updated>
<author>
<name>Faiz Abbas</name>
<email>faiz_abbas@ti.com</email>
</author>
<published>2018-07-09T16:48:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7f35e63dbfcb627bd30bac45702ffdf1ddde1516'/>
<id>7f35e63dbfcb627bd30bac45702ffdf1ddde1516</id>
<content type='text'>
The dra76x MCAN generic interconnect module has a its own
format for the bits in the control registers.

Therefore add a new module type, new regbits and new capabilities
specific to the MCAN module.

Acked-by: Rob Herring &lt;robh@kernel.org&gt;
CC: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Faiz Abbas &lt;faiz_abbas@ti.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
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<pre>
The dra76x MCAN generic interconnect module has a its own
format for the bits in the control registers.

Therefore add a new module type, new regbits and new capabilities
specific to the MCAN module.

Acked-by: Rob Herring &lt;robh@kernel.org&gt;
CC: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Faiz Abbas &lt;faiz_abbas@ti.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>bus: ti-sysc: Use 2-factor allocator arguments</title>
<updated>2018-07-02T11:24:44+00:00</updated>
<author>
<name>Kees Cook</name>
<email>keescook@chromium.org</email>
</author>
<published>2018-06-18T17:45:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=207490517cf80d99f471d1b54e747eb95a4b8bea'/>
<id>207490517cf80d99f471d1b54e747eb95a4b8bea</id>
<content type='text'>
This adjusts the allocator calls to use 2-factor argument call style, as
done treewide already for improved defense against allocation overflows.

Signed-off-by: Kees Cook &lt;keescook@chromium.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
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<pre>
This adjusts the allocator calls to use 2-factor argument call style, as
done treewide already for improved defense against allocation overflows.

Signed-off-by: Kees Cook &lt;keescook@chromium.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>bus: ti-sysc: Fix optional clocks array access</title>
<updated>2018-05-18T14:54:44+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2018-05-18T14:54:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c97c8620833e4a55ddb7a43961d3205184a487f0'/>
<id>c97c8620833e4a55ddb7a43961d3205184a487f0</id>
<content type='text'>
We should be checking ddata-&gt;clocks[i] instead of clock_names[i]
for the optional clocks. Currently this just happens to work for
the typical case of one fck and one optional clock.

Fixes: 09dfe5810762 ("bus: ti-sysc: Add handling for clkctrl opt clocks")
Cc: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Reported-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
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<pre>
We should be checking ddata-&gt;clocks[i] instead of clock_names[i]
for the optional clocks. Currently this just happens to work for
the typical case of one fck and one optional clock.

Fixes: 09dfe5810762 ("bus: ti-sysc: Add handling for clkctrl opt clocks")
Cc: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Reported-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>bus: ti-sysc: Show module information for suspend if DEBUG is enabled</title>
<updated>2018-05-01T13:54:17+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2018-04-16T17:26:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=dc4c85eac6bc8cfe25144936c5636aa1415bbc12'/>
<id>dc4c85eac6bc8cfe25144936c5636aa1415bbc12</id>
<content type='text'>
Let's show module info if DEBUG is enabled to make it easier to follow
what happens on the suspend and resume path.

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
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<pre>
Let's show module info if DEBUG is enabled to make it easier to follow
what happens on the suspend and resume path.

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>bus: ti-sysc: Tag sdio and wdt with legacy mode for suspend</title>
<updated>2018-05-01T13:54:17+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2018-04-20T21:54:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7e27e5d05a13bdee494442faf3e78bd544d4ccdf'/>
<id>7e27e5d05a13bdee494442faf3e78bd544d4ccdf</id>
<content type='text'>
Looks like these two device drivers don't yet behave properly for suspend
unless configured with the legacy option.

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
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<pre>
Looks like these two device drivers don't yet behave properly for suspend
unless configured with the legacy option.

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>bus: ti-sysc: Detect UARTs for SYSC_QUIRK_LEGACY_IDLE quirk on omap4</title>
<updated>2018-05-01T13:54:17+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2018-04-16T17:25:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d708bb14971ce797ac6d64aea19e2f8f41859f54'/>
<id>d708bb14971ce797ac6d64aea19e2f8f41859f54</id>
<content type='text'>
Starting with omap4, UARTs have different revision register that we need to
detect to enable SYSC_QUIRK_LEGACY_IDLE. Otherwise UARTs won't idle properly.

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
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<pre>
Starting with omap4, UARTs have different revision register that we need to
detect to enable SYSC_QUIRK_LEGACY_IDLE. Otherwise UARTs won't idle properly.

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</pre>
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