linux.git/drivers/base/power/domain.c, branch v6.7 Linux kernel source tree Merge branch 'opp/pm-domain-scmi' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm into for-next/scmi/updates 2023-10-06T08:40:10+00:00 Sudeep Holla sudeep.holla@arm.com 2023-10-06T08:40:10+00:00 0a30c0e9ca293a6680b1a124684cf80c142b1fa0 This is the merge of immutable point in PM OPP tree shared with SCMI so that the SCMI changes based on these OPP changes can be merged via the SCMI tree. * 'opp/pm-domain-scmi' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm: OPP: Extend support for the opp-level beyond required-opps OPP: Switch to use dev_pm_domain_set_performance_state() OPP: Extend dev_pm_opp_data with a level OPP: Add dev_pm_opp_add_dynamic() to allow more flexibility PM: domains: Implement the ->set_performance_state() callback for genpd PM: domains: Introduce dev_pm_domain_set_performance_state() 
This is the merge of immutable point in PM OPP tree shared with SCMI so
that the SCMI changes based on these OPP changes can be merged via the
SCMI tree.

* 'opp/pm-domain-scmi' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
  OPP: Extend support for the opp-level beyond required-opps
  OPP: Switch to use dev_pm_domain_set_performance_state()
  OPP: Extend dev_pm_opp_data with a level
  OPP: Add dev_pm_opp_add_dynamic() to allow more flexibility
  PM: domains: Implement the ->set_performance_state() callback for genpd
  PM: domains: Introduce dev_pm_domain_set_performance_state()
PM: domains: Implement the ->set_performance_state() callback for genpd 2023-10-06T07:07:33+00:00 Ulf Hansson ulf.hansson@linaro.org 2023-09-25T13:17:08+00:00 401e09201a01183f1cc8533aa956cb837bf6d3da To enable generic support for performance scaling for PM domains, let's implement the ->set_performance_state() callback for genpd. Beyond this change, users of the corresponding genpd specific API, dev_pm_genpd_set_performance_state() are encouraged to switch to the common dev_pm_domain_set_performance_state() API. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> 
To enable generic support for performance scaling for PM domains, let's
implement the ->set_performance_state() callback for genpd.

Beyond this change, users of the corresponding genpd specific API,
dev_pm_genpd_set_performance_state() are encouraged to switch to the common
dev_pm_domain_set_performance_state() API.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
PM: domains: Allow genpd providers to manage OPP tables directly by its FW 2023-09-21T15:35:14+00:00 Ulf Hansson ulf.hansson@linaro.org 2023-08-25T11:26:32+00:00 3dd91515ef43dd43e32e2a84e4bd881b64fb33ae In some cases the OPP tables aren't specified in device tree, but rather encoded in the FW. To allow a genpd provider to specify them dynamically instead, let's add a new genpd flag, GENPD_FLAG_OPP_TABLE_FW. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20230825112633.236607-13-ulf.hansson@linaro.org Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> 
In some cases the OPP tables aren't specified in device tree, but rather
encoded in the FW. To allow a genpd provider to specify them dynamically
instead, let's add a new genpd flag, GENPD_FLAG_OPP_TABLE_FW.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20230825112633.236607-13-ulf.hansson@linaro.org
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
PM: domains: Move the verification of in-params from genpd_add_device() 2023-06-16T17:39:51+00:00 Ulf Hansson ulf.hansson@linaro.org 2023-05-30T09:55:36+00:00 4384a70c8813e8573d1841fd94eee873f80a7e1a Commit f38d1a6d0025 ("PM: domains: Allocate governor data dynamically based on a genpd governor") started to use the in-parameters in genpd_add_device(), without first doing a verification of them. This isn't really a big problem, as most callers do a verification already. Therefore, let's drop the verification from genpd_add_device() and make sure all the callers take care of it instead. Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Fixes: f38d1a6d0025 ("PM: domains: Allocate governor data dynamically based on a genpd governor") Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> 
Commit f38d1a6d0025 ("PM: domains: Allocate governor data dynamically
based on a genpd governor") started to use the in-parameters in
genpd_add_device(), without first doing a verification of them.

This isn't really a big problem, as most callers do a verification already.

Therefore, let's drop the verification from genpd_add_device() and make
sure all the callers take care of it instead.

Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Fixes: f38d1a6d0025 ("PM: domains: Allocate governor data dynamically based on a genpd governor")
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
PM: domains: fix integer overflow issues in genpd_parse_state() 2023-05-24T16:37:28+00:00 Nikita Zhandarovich n.zhandarovich@fintech.ru 2023-04-18T13:07:43+00:00 e5d1c8722083f0332dcd3c85fa1273d85fb6bed8 Currently, while calculating residency and latency values, right operands may overflow if resulting values are big enough. To prevent this, albeit unlikely case, play it safe and convert right operands to left ones' type s64. Found by Linux Verification Center (linuxtesting.org) with static analysis tool SVACE. Fixes: 30f604283e05 ("PM / Domains: Allow domain power states to be read from DT") Signed-off-by: Nikita Zhandarovich <n.zhandarovich@fintech.ru> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> 
Currently, while calculating residency and latency values, right
operands may overflow if resulting values are big enough.

To prevent this, albeit unlikely case, play it safe and convert
right operands to left ones' type s64.

Found by Linux Verification Center (linuxtesting.org) with static
analysis tool SVACE.

Fixes: 30f604283e05 ("PM / Domains: Allow domain power states to be read from DT")
Signed-off-by: Nikita Zhandarovich <n.zhandarovich@fintech.ru>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 2023-02-25T23:16:23+00:00 Linus Torvalds torvalds@linux-foundation.org 2023-02-25T23:16:23+00:00 1ec35eadc3b448c91a6b763371a7073444e95f9d Pull clk updates from Stephen Boyd: "We have one small patch to the clk core this time around. It fixes a corner case with the CLK_OPS_PARENT_ENABLE flag combined with clk_core_is_enabled() where it hangs the system. We'll simply assume the clk is disabled if the parent is disabled and the flag is set. Trying to turn on the parent to check the enable state of the clk runs into system hangs at boot. We let this bake in -next for a couple weeks to make sure there aren't any more issues because the last attempt to fix this ran into hangs and had to be reverted. Note: There were some more patches to the core framework around sync_state and disabling unused clks, but I asked for that to be reverted from the qcom PR because it isn't ready and we're still discussing the best solution on the list. Outside of the core clk framework, we have the usual collection of clk driver updates and support for new SoCs (which seems to never stop). The dirstat is dominated by Qualcomm because they added support for quite a few SoCs this time around and also migrated quite a few of their drivers to clk_parent_data. The other big diff is in the Mediatek clk drivers that saw a significant rework this cycle to similarly modernize the code, and we'll see that work continue in the next cycle as well. Nothing really jumps out as scary here, except that the significant churn in parent data descriptions can have typos that go unnoticed. More details below. Core: - Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled() New Drivers: - Add a new clk-gpr-mux clock type and use it on i.MX6Q to add ENET ref clocks - Support for Mediatek MT7891 SoC clks - Support for many Qualcomm clk controllers: - QDU1000/QRU1000 global clock controller - SA8775P global clock controller - SM8550 TCSR and display clock controller - SM6350 clock controller - MSM8996 CBF and APCS clock controllers Updates: - Various cleanups and improvements to Mediatek clk drivers to reduce code size and modernize the drivers - Support for Versa 5P49V60 clks - Disable R-Car H3 ES1.*, as it was only available to an internal development group and needed a lot of quirks and workarounds - Add PWM, Compare-Match Timer (TIM), USB, SDHI, and eMMC clocks and resets on Renesas RZ/V2M - Add display clocks on Renesas R-Car V4H - Add Camera Receiving Unit (CRU) clocks and resets on Renesas RZ/G2L - Free the imx_uart_clocks even if imx_register_uart_clocks returns early - Get the stdout clocks count from device tree on i.MX - Drop the clock count argument from imx_register_uart_clocks() - Keep the uart clocks on i.MX93 for when earlycon is used - Fix SPDX comment in i.MX6SLL clocks bindings header - Drop some unnecessary spaces from i.MX8ULP clocks bindings header - Add imx_obtain_fixed_of_clock() for allowing to add a clock that is not configured via devicetree - Fix the ENET1 gate configuration for i.MX6UL according to the reference manual - Add ENET refclock mux support for i.MX6UL - Add support for USB host/device configuration on Renesas RZ/N1 - Add PLL2 programming support, and CAN-FD clocks on Renesas R-Car V4H - Add D1 CAN bus gates and resets for Allwinner - Mark D1 CPUX clock as critical on Allwinner - Reuse D1 driver for Allwinner R528/T113 - Cleanup sunxi-ng Kconfig - Fix sunxi-ng kernel-doc issues - Model Allwinner H3/H5 DRAM clock as fixed clock - Use .determine_rate() instead of .round_rate() for the dualdiv, mpll, sclk-div and cpu-dyn-div amlogic clock drivers - DDR clocks were marked as critical in the proper clock driver for each AT91 SoC such that drivers/memory/atmel-sdramc.c to be deleted in the next releases as it only does clock enablement - Patch to avoid compiling dt-compat.o for all AT91 SoCs as only some of them may use it - Support synchronous power_off requests in the qcom GDSC driver for proper GPU power collapse - Drop test clocks from various Qualcomm clk drivers - Update parent references to use clk_parent_data/clk_hw in various Qualcomm clk drivers - Fixes for the Qualcomm MSM8996 CPU clock controller - Transition Qualcomm MSM8974 GCC off the externally defined sleep_clk - Add GDSCs in the global clock controller for Qualcomm QCS404 - The SDCC core clocks on Qualcomm SM6115 are moved to floor_ops - Programming of clk_dis_wait for GPU CX GDSC on Qualcomm SC7180 and SDM845 are moved to use the recently introduced properties in the GDSC struct - Qualcomm's RPMh clock driver gains SM8550 and SA8775P clocks, and the IPA clock is added on a variety of platforms - De-duplicate identical clks in Qualcomm SMD RPM clk driver - Add a few missing clocks across msm8998, msm8992, msm8916, qcs404 to Qualcomm SDM RPM clk driver - Various Qualcomm clk drivers use devm_pm_runtime_enable() to simplify" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (228 commits) clk: qcom: apcs-msm8986: Include bitfield.h for FIELD_PREP clk: qcom: Revert sync_state based clk_disable_unused clk: imx: pll14xx: fix recalc_rate for negative kdiv clk: rs9: Drop unused pin_xin field MAINTAINERS: clk: imx: Add Peng Fan as reviewer clk: sprd: Add dependency for SPRD_UMS512_CLK clk: ralink: fix 'mt7621_gate_is_enabled()' function clk: mediatek: clk-mtk: Remove unneeded semicolon dt-bindings: clock: remove stih416 bindings dt-bindings: clock: add loongson-2 clock dt-bindings: clock: add loongson-2 clock include file clk: imx: fix compile testing imxrt1050 clk: Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled() clk: imx: set imx_clk_gpr_mux_ops storage-class-specifier to static clk: renesas: rcar-gen3: Disable R-Car H3 ES1.* dt-bindings: clock: Merge qcom,gpucc-sm8350 into qcom,gpucc.yaml clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC dt-bindings: clock: qcom,sa8775p-gcc: add the power-domains property clk: qcom: cpu-8996: add missing cputype include ... 
Pull clk updates from Stephen Boyd:
 "We have one small patch to the clk core this time around. It fixes a
  corner case with the CLK_OPS_PARENT_ENABLE flag combined with
  clk_core_is_enabled() where it hangs the system. We'll simply assume
  the clk is disabled if the parent is disabled and the flag is set.
  Trying to turn on the parent to check the enable state of the clk runs
  into system hangs at boot. We let this bake in -next for a couple
  weeks to make sure there aren't any more issues because the last
  attempt to fix this ran into hangs and had to be reverted.

  Note: There were some more patches to the core framework around
  sync_state and disabling unused clks, but I asked for that to be
  reverted from the qcom PR because it isn't ready and we're still
  discussing the best solution on the list.

  Outside of the core clk framework, we have the usual collection of clk
  driver updates and support for new SoCs (which seems to never stop).
  The dirstat is dominated by Qualcomm because they added support for
  quite a few SoCs this time around and also migrated quite a few of
  their drivers to clk_parent_data. The other big diff is in the
  Mediatek clk drivers that saw a significant rework this cycle to
  similarly modernize the code, and we'll see that work continue in the
  next cycle as well. Nothing really jumps out as scary here, except
  that the significant churn in parent data descriptions can have typos
  that go unnoticed. More details below.

  Core:
   - Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled()

  New Drivers:
   - Add a new clk-gpr-mux clock type and use it on i.MX6Q to add ENET
     ref clocks
   - Support for Mediatek MT7891 SoC clks
   - Support for many Qualcomm clk controllers:
      - QDU1000/QRU1000 global clock controller
      - SA8775P global clock controller
      - SM8550 TCSR and display clock controller
      - SM6350 clock controller
      - MSM8996 CBF and APCS clock controllers

  Updates:
   - Various cleanups and improvements to Mediatek clk drivers to reduce
     code size and modernize the drivers
   - Support for Versa 5P49V60 clks
   - Disable R-Car H3 ES1.*, as it was only available to an internal
     development group and needed a lot of quirks and workarounds
   - Add PWM, Compare-Match Timer (TIM), USB, SDHI, and eMMC clocks and
     resets on Renesas RZ/V2M
   - Add display clocks on Renesas R-Car V4H
   - Add Camera Receiving Unit (CRU) clocks and resets on Renesas RZ/G2L
   - Free the imx_uart_clocks even if imx_register_uart_clocks returns
     early
   - Get the stdout clocks count from device tree on i.MX
   - Drop the clock count argument from imx_register_uart_clocks()
   - Keep the uart clocks on i.MX93 for when earlycon is used
   - Fix SPDX comment in i.MX6SLL clocks bindings header
   - Drop some unnecessary spaces from i.MX8ULP clocks bindings header
   - Add imx_obtain_fixed_of_clock() for allowing to add a clock that is
     not configured via devicetree
   - Fix the ENET1 gate configuration for i.MX6UL according to the
     reference manual
   - Add ENET refclock mux support for i.MX6UL
   - Add support for USB host/device configuration on Renesas RZ/N1
   - Add PLL2 programming support, and CAN-FD clocks on Renesas R-Car
     V4H
   - Add D1 CAN bus gates and resets for Allwinner
   - Mark D1 CPUX clock as critical on Allwinner
   - Reuse D1 driver for Allwinner R528/T113
   - Cleanup sunxi-ng Kconfig
   - Fix sunxi-ng kernel-doc issues
   - Model Allwinner H3/H5 DRAM clock as fixed clock
   - Use .determine_rate() instead of .round_rate() for the dualdiv,
     mpll, sclk-div and cpu-dyn-div amlogic clock drivers
   - DDR clocks were marked as critical in the proper clock driver for
     each AT91 SoC such that drivers/memory/atmel-sdramc.c to be deleted
     in the next releases as it only does clock enablement
   - Patch to avoid compiling dt-compat.o for all AT91 SoCs as only some
     of them may use it
   - Support synchronous power_off requests in the qcom GDSC driver for
     proper GPU power collapse
   - Drop test clocks from various Qualcomm clk drivers
   - Update parent references to use clk_parent_data/clk_hw in various
     Qualcomm clk drivers
   - Fixes for the Qualcomm MSM8996 CPU clock controller
   - Transition Qualcomm MSM8974 GCC off the externally defined
     sleep_clk
   - Add GDSCs in the global clock controller for Qualcomm QCS404
   - The SDCC core clocks on Qualcomm SM6115 are moved to floor_ops
   - Programming of clk_dis_wait for GPU CX GDSC on Qualcomm SC7180 and
     SDM845 are moved to use the recently introduced properties in the
     GDSC struct
   - Qualcomm's RPMh clock driver gains SM8550 and SA8775P clocks, and
     the IPA clock is added on a variety of platforms
   - De-duplicate identical clks in Qualcomm SMD RPM clk driver
   - Add a few missing clocks across msm8998, msm8992, msm8916, qcs404
     to Qualcomm SDM RPM clk driver
   - Various Qualcomm clk drivers use devm_pm_runtime_enable() to
     simplify"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (228 commits)
  clk: qcom: apcs-msm8986: Include bitfield.h for FIELD_PREP
  clk: qcom: Revert sync_state based clk_disable_unused
  clk: imx: pll14xx: fix recalc_rate for negative kdiv
  clk: rs9: Drop unused pin_xin field
  MAINTAINERS: clk: imx: Add Peng Fan as reviewer
  clk: sprd: Add dependency for SPRD_UMS512_CLK
  clk: ralink: fix 'mt7621_gate_is_enabled()' function
  clk: mediatek: clk-mtk: Remove unneeded semicolon
  dt-bindings: clock: remove stih416 bindings
  dt-bindings: clock: add loongson-2 clock
  dt-bindings: clock: add loongson-2 clock include file
  clk: imx: fix compile testing imxrt1050
  clk: Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled()
  clk: imx: set imx_clk_gpr_mux_ops storage-class-specifier to static
  clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*
  dt-bindings: clock: Merge qcom,gpucc-sm8350 into qcom,gpucc.yaml
  clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC
  clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC
  dt-bindings: clock: qcom,sa8775p-gcc: add the power-domains property
  clk: qcom: cpu-8996: add missing cputype include
  ...
PM: domains: fix memory leak with using debugfs_lookup() 2023-02-09T19:33:38+00:00 Greg Kroah-Hartman gregkh@linuxfoundation.org 2023-02-02T14:15:45+00:00 0b6200e1e9f53dabdc30d0f6c51af9a5f664d32b When calling debugfs_lookup() the result must have dput() called on it, otherwise the memory will leak over time. To make things simpler, just call debugfs_lookup_and_remove() instead which handles all of the logic at once. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> 
When calling debugfs_lookup() the result must have dput() called on it,
otherwise the memory will leak over time.  To make things simpler, just
call debugfs_lookup_and_remove() instead which handles all of the logic
at once.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
PM: domains: Allow a genpd consumer to require a synced power off 2023-01-10T17:07:10+00:00 Ulf Hansson ulf.hansson@linaro.org 2023-01-02T10:48:27+00:00 a9236a0aa7d7f52a974cc7eaa971fae92aa477c5 Some genpd providers doesn't ensure that it has turned off at hardware. This is fine until the consumer really requires during some special scenarios that the power domain collapse at hardware before it is turned ON again. An example is the reset sequence of Adreno GPU which requires that the 'gpucc cx gdsc' power domain should move to OFF state in hardware at least once before turning in ON again to clear the internal state. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230102161757.v5.1.I3e6b1f078ad0f1ca9358c573daa7b70ec132cdbe@changeid 
Some genpd providers doesn't ensure that it has turned off at hardware.
This is fine until the consumer really requires during some special
scenarios that the power domain collapse at hardware before it is
turned ON again.

An example is the reset sequence of Adreno GPU which requires that the
'gpucc cx gdsc' power domain should move to OFF state in hardware at
least once before turning in ON again to clear the internal state.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102161757.v5.1.I3e6b1f078ad0f1ca9358c573daa7b70ec132cdbe@changeid
Merge tag 'pm-6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm 2022-12-12T21:19:07+00:00 Linus Torvalds torvalds@linux-foundation.org 2022-12-12T21:19:07+00:00 045e222d0a9dcec152abe0633f538cafd965b12b Pull power management updates from Rafael Wysocki: "These include two new drivers (cpufreq driver for Apple SoC CPU P-states and the SCMI Powercap based power capping driver), other new hardware support and driver extensions (Qualcomm cpufreq driver and its DT bindings, TI cpufreq driver, intel_pstate, intel-uncore-freq), a bunch of fixes and cleanups all over and a cpupower utility update including new features related to RAPL support. Specifics: - Fix nasty and hard to debug race condition introduced by mistake in the runtime PM core code and clean up that code somewhat on top of the fix (Rafael Wysocki) - Generalize of_perf_domain_get_sharing_cpumask phandle format (Hector Martin) - Add new cpufreq driver for Apple SoC CPU P-states (Hector Martin) - Update Qualcomm cpufreq driver (Manivannan Sadhasivam, Chen Hui): - CPU clock provider support - Generic cleanups or reorganization - Potential memleak fix - Fix of the return value of cpufreq_driver->get() - Update Qualcomm cpufreq driver's DT bindings (Manivannan Sadhasivam, Rob Herring, Melody Olvera): - Support for CPU clock provider - Missing cache-related properties fixes - Support for QDU1000/QRU1000 - Add support for ti,am625 SoC and enable build of ti-cpufreq for ARCH_K3 (Dave Gerlach, and Vibhore Vardhan) - Use flexible array to simplify memory allocation in the tegra186 cpufreq driver (Christophe JAILLET) - Convert cpufreq statistics code to use sysfs_emit_at() (ye xingchen) - Allow intel_pstate to use no-HWP mode on Sapphire Rapids (Giovanni Gherdovich) - Add missing pci_dev_put() to the amd_freq_sensitivity cpufreq driver (Xiongfeng Wang) - Initialize the kobj_unregister completion before calling kobject_init_and_add() in the cpufreq core code (Yongqiang Liu) - Defer setting boost MSRs in the ACPI cpufreq driver (Stuart Hayes, Nathan Chancellor) - Make intel_pstate accept initial EPP value of 0x80 (Srinivas Pandruvada) - Make read-only array sys_clk_src in the SPEAr cpufreq driver static (Colin Ian King) - Make array speeds in the longhaul cpufreq driver static (Colin Ian King) - Use str_enabled_disabled() helper in the ACPI cpufreq driver (Andy Shevchenko) - Drop a reference to CVS from cpufreq documentation (Conghui Wang) - Improve kernel messages printed by the PSCI cpuidle driver (Ulf Hansson) - Make the DT cpuidle driver return the correct number of parsed idle states, clean it up and clarify a comment in it (Ulf Hansson) - Modify the tasks freezing code to avoid using pr_cont() and refine an error message printed by it (Rafael Wysocki) - Make the hibernation core code complain about memory map mismatches during resume to help diagnostics (Xueqin Luo) - Fix mistake in a kerneldoc comment in the hibernation code (xiongxin) - Reverse the order of performance and enabling operations in the generic power domains code (Abel Vesa) - Power off[on] domains in hibernate .freeze[thaw]_noirq hook of in the generic power domains code (Abel Vesa) - Consolidate genpd_restore_noirq() and genpd_resume_noirq() (Shawn Guo) - Pass generic PM noirq hooks to genpd_finish_suspend() (Shawn Guo) - Drop generic power domain status manipulation during hibernate restore (Shawn Guo) - Fix compiler warnings with make W=1 in the idle_inject power capping driver (Srinivas Pandruvada) - Use kstrtobool() instead of strtobool() in the power capping sysfs interface (Christophe JAILLET) - Add SCMI Powercap based power capping driver (Cristian Marussi) - Add Emerald Rapids support to the intel-uncore-freq driver (Artem Bityutskiy) - Repair slips in kernel-doc comments in the generic notifier code (Lukas Bulwahn) - Fix several DT issues in the OPP library reorganize code around opp-microvolt-<named> DT property (Viresh Kumar) - Allow any of opp-microvolt, opp-microamp, or opp-microwatt properties to be present without the others present (James Calligeros) - Fix clock-latency-ns property in DT example (Serge Semin) - Add a private governor_data for devfreq governors (Kant Fan) - Reorganize devfreq code to use device_match_of_node() and devm_platform_get_and_ioremap_resource() instead of open coding them (ye xingchen, Minghao Chi) - Make cpupower choose base_cpu to display default cpupower details instead of picking CPU 0 (Saket Kumar Bhaskar) - Add Georgian translation to cpupower documentation (Zurab Kargareteli) - Introduce powercap intel-rapl library, powercap-info command, and RAPL monitor into cpupower (Thomas Renninger)" * tag 'pm-6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (64 commits) PM: runtime: Adjust white space in the core code cpufreq: Remove CVS version control contents from documentation cpufreq: stats: Convert to use sysfs_emit_at() API cpufreq: ACPI: Only set boost MSRs on supported CPUs PM: sleep: Refine error message in try_to_freeze_tasks() PM: sleep: Avoid using pr_cont() in the tasks freezing code PM: runtime: Relocate rpm_callback() right after __rpm_callback() PM: runtime: Do not call __rpm_callback() from rpm_idle() PM / devfreq: event: use devm_platform_get_and_ioremap_resource() PM / devfreq: event: Use device_match_of_node() PM / devfreq: Use device_match_of_node() powercap: idle_inject: Fix warnings with make W=1 PM: hibernate: Complain about memory map mismatches during resume dt-bindings: cpufreq: cpufreq-qcom-hw: Add QDU1000/QRU1000 cpufreq cpufreq: tegra186: Use flexible array to simplify memory allocation cpupower: rapl monitor - shows the used power consumption in uj for each rapl domain cpupower: Introduce powercap intel-rapl library and powercap-info command cpupower: Add Georgian translation cpufreq: intel_pstate: Add Sapphire Rapids support in no-HWP mode cpufreq: amd_freq_sensitivity: Add missing pci_dev_put() ... 
Pull power management updates from Rafael Wysocki:
 "These include two new drivers (cpufreq driver for Apple SoC CPU
  P-states and the SCMI Powercap based power capping driver), other new
  hardware support and driver extensions (Qualcomm cpufreq driver and
  its DT bindings, TI cpufreq driver, intel_pstate, intel-uncore-freq),
  a bunch of fixes and cleanups all over and a cpupower utility update
  including new features related to RAPL support.

  Specifics:

   - Fix nasty and hard to debug race condition introduced by mistake in
     the runtime PM core code and clean up that code somewhat on top of
     the fix (Rafael Wysocki)

   - Generalize of_perf_domain_get_sharing_cpumask phandle format
     (Hector Martin)

   - Add new cpufreq driver for Apple SoC CPU P-states (Hector Martin)

   - Update Qualcomm cpufreq driver (Manivannan Sadhasivam, Chen Hui):
      - CPU clock provider support
      - Generic cleanups or reorganization
      - Potential memleak fix
      - Fix of the return value of cpufreq_driver->get()

   - Update Qualcomm cpufreq driver's DT bindings (Manivannan
     Sadhasivam, Rob Herring, Melody Olvera):
      - Support for CPU clock provider
      - Missing cache-related properties fixes
      - Support for QDU1000/QRU1000

   - Add support for ti,am625 SoC and enable build of ti-cpufreq for
     ARCH_K3 (Dave Gerlach, and Vibhore Vardhan)

   - Use flexible array to simplify memory allocation in the tegra186
     cpufreq driver (Christophe JAILLET)

   - Convert cpufreq statistics code to use sysfs_emit_at() (ye
     xingchen)

   - Allow intel_pstate to use no-HWP mode on Sapphire Rapids (Giovanni
     Gherdovich)

   - Add missing pci_dev_put() to the amd_freq_sensitivity cpufreq
     driver (Xiongfeng Wang)

   - Initialize the kobj_unregister completion before calling
     kobject_init_and_add() in the cpufreq core code (Yongqiang Liu)

   - Defer setting boost MSRs in the ACPI cpufreq driver (Stuart Hayes,
     Nathan Chancellor)

   - Make intel_pstate accept initial EPP value of 0x80 (Srinivas
     Pandruvada)

   - Make read-only array sys_clk_src in the SPEAr cpufreq driver static
     (Colin Ian King)

   - Make array speeds in the longhaul cpufreq driver static (Colin Ian
     King)

   - Use str_enabled_disabled() helper in the ACPI cpufreq driver (Andy
     Shevchenko)

   - Drop a reference to CVS from cpufreq documentation (Conghui Wang)

   - Improve kernel messages printed by the PSCI cpuidle driver (Ulf
     Hansson)

   - Make the DT cpuidle driver return the correct number of parsed idle
     states, clean it up and clarify a comment in it (Ulf Hansson)

   - Modify the tasks freezing code to avoid using pr_cont() and refine
     an error message printed by it (Rafael Wysocki)

   - Make the hibernation core code complain about memory map mismatches
     during resume to help diagnostics (Xueqin Luo)

   - Fix mistake in a kerneldoc comment in the hibernation code
     (xiongxin)

   - Reverse the order of performance and enabling operations in the
     generic power domains code (Abel Vesa)

   - Power off[on] domains in hibernate .freeze[thaw]_noirq hook of in
     the generic power domains code (Abel Vesa)

   - Consolidate genpd_restore_noirq() and genpd_resume_noirq() (Shawn
     Guo)

   - Pass generic PM noirq hooks to genpd_finish_suspend() (Shawn Guo)

   - Drop generic power domain status manipulation during hibernate
     restore (Shawn Guo)

   - Fix compiler warnings with make W=1 in the idle_inject power
     capping driver (Srinivas Pandruvada)

   - Use kstrtobool() instead of strtobool() in the power capping sysfs
     interface (Christophe JAILLET)

   - Add SCMI Powercap based power capping driver (Cristian Marussi)

   - Add Emerald Rapids support to the intel-uncore-freq driver (Artem
     Bityutskiy)

   - Repair slips in kernel-doc comments in the generic notifier code
     (Lukas Bulwahn)

   - Fix several DT issues in the OPP library reorganize code around
     opp-microvolt-<named> DT property (Viresh Kumar)

   - Allow any of opp-microvolt, opp-microamp, or opp-microwatt
     properties to be present without the others present (James
     Calligeros)

   - Fix clock-latency-ns property in DT example (Serge Semin)

   - Add a private governor_data for devfreq governors (Kant Fan)

   - Reorganize devfreq code to use device_match_of_node() and
     devm_platform_get_and_ioremap_resource() instead of open coding
     them (ye xingchen, Minghao Chi)

   - Make cpupower choose base_cpu to display default cpupower details
     instead of picking CPU 0 (Saket Kumar Bhaskar)

   - Add Georgian translation to cpupower documentation (Zurab
     Kargareteli)

   - Introduce powercap intel-rapl library, powercap-info command, and
     RAPL monitor into cpupower (Thomas Renninger)"

* tag 'pm-6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (64 commits)
  PM: runtime: Adjust white space in the core code
  cpufreq: Remove CVS version control contents from documentation
  cpufreq: stats: Convert to use sysfs_emit_at() API
  cpufreq: ACPI: Only set boost MSRs on supported CPUs
  PM: sleep: Refine error message in try_to_freeze_tasks()
  PM: sleep: Avoid using pr_cont() in the tasks freezing code
  PM: runtime: Relocate rpm_callback() right after __rpm_callback()
  PM: runtime: Do not call __rpm_callback() from rpm_idle()
  PM / devfreq: event: use devm_platform_get_and_ioremap_resource()
  PM / devfreq: event: Use device_match_of_node()
  PM / devfreq: Use device_match_of_node()
  powercap: idle_inject: Fix warnings with make W=1
  PM: hibernate: Complain about memory map mismatches during resume
  dt-bindings: cpufreq: cpufreq-qcom-hw: Add QDU1000/QRU1000 cpufreq
  cpufreq: tegra186: Use flexible array to simplify memory allocation
  cpupower: rapl monitor - shows the used power consumption in uj for each rapl domain
  cpupower: Introduce powercap intel-rapl library and powercap-info command
  cpupower: Add Georgian translation
  cpufreq: intel_pstate: Add Sapphire Rapids support in no-HWP mode
  cpufreq: amd_freq_sensitivity: Add missing pci_dev_put()
  ...
Merge tag 'soc-drivers-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 2022-12-12T18:17:08+00:00 Linus Torvalds torvalds@linux-foundation.org 2022-12-12T18:17:08+00:00 8e17b16a2c13406c56a4d292df3ca083f8729666 Pull ARM SoC driver updates from Arnd Bergmann: "There are few major updates in the SoC specific drivers, mainly the usual reworks and support for variants of the existing SoC. While this remains Arm centric for the most part, the branch now also contains updates to risc-v and loongarch specific code in drivers/soc/. Notable changes include: - Support for the newly added Qualcomm Snapdragon variants (MSM8956, MSM8976, SM6115, SM4250, SM8150, SA8155 and SM8550) in the soc ID, rpmh, rpm, spm and powerdomain drivers. - Documentation for the somewhat controversial qcom,board-id properties that are required for booting a number of machines - A new SoC identification driver for the loongson-2 (loongarch) platform - memory controller updates for stm32, tegra, and renesas. - a new DT binding to better describe LPDDR2/3/4/5 chips in the memory controller subsystem - Updates for Tegra specific drivers across multiple subsystems, improving support for newer SoCs and better identification - Minor fixes for Broadcom, Freescale, Apple, Renesas, Sifive, TI, Mediatek and Marvell SoC drivers" * tag 'soc-drivers-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (137 commits) soc: qcom: socinfo: Add SM6115 / SM4250 SoC IDs to the soc_id table dt-bindings: arm: qcom,ids: Add SoC IDs for SM6115 / SM4250 and variants soc: qcom: socinfo: Add SM8150 and SA8155 SoC IDs to the soc_id table dt-bindings: arm: qcom,ids: Add SoC IDs for SM8150 and SA8155 dt-bindings: soc: qcom: apr: document generic qcom,apr compatible soc: qcom: Select REMAP_MMIO for ICC_BWMON driver soc: qcom: Select REMAP_MMIO for LLCC driver soc: qcom: rpmpd: Add SM4250 support dt-bindings: power: rpmpd: Add SM4250 support dt-bindings: soc: qcom: aoss: Add compatible for SM8550 soc: qcom: llcc: Add configuration data for SM8550 dt-bindings: arm: msm: Add LLCC compatible for SM8550 soc: qcom: llcc: Add v4.1 HW version support soc: qcom: socinfo: Add SM8550 ID soc: qcom: rpmh-rsc: Avoid unnecessary checks on irq-done response soc: qcom: rpmh-rsc: Add support for RSC v3 register offsets soc: qcom: rpmhpd: Add SM8550 power domains dt-bindings: power: rpmpd: Add SM8550 to rpmpd binding soc: qcom: socinfo: Add MSM8956/76 SoC IDs to the soc_id table dt-bindings: arm: qcom,ids: Add SoC IDs for MSM8956 and MSM8976 ... 
Pull ARM SoC driver updates from Arnd Bergmann:
 "There are few major updates in the SoC specific drivers, mainly the
  usual reworks and support for variants of the existing SoC. While this
  remains Arm centric for the most part, the branch now also contains
  updates to risc-v and loongarch specific code in drivers/soc/.

  Notable changes include:

   - Support for the newly added Qualcomm Snapdragon variants (MSM8956,
     MSM8976, SM6115, SM4250, SM8150, SA8155 and SM8550) in the soc ID,
     rpmh, rpm, spm and powerdomain drivers.

   - Documentation for the somewhat controversial qcom,board-id
     properties that are required for booting a number of machines

   - A new SoC identification driver for the loongson-2 (loongarch)
     platform

   - memory controller updates for stm32, tegra, and renesas.

   - a new DT binding to better describe LPDDR2/3/4/5 chips in the
     memory controller subsystem

   - Updates for Tegra specific drivers across multiple subsystems,
     improving support for newer SoCs and better identification

   - Minor fixes for Broadcom, Freescale, Apple, Renesas, Sifive, TI,
     Mediatek and Marvell SoC drivers"

* tag 'soc-drivers-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (137 commits)
  soc: qcom: socinfo: Add SM6115 / SM4250 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for SM6115 / SM4250 and variants
  soc: qcom: socinfo: Add SM8150 and SA8155 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for SM8150 and SA8155
  dt-bindings: soc: qcom: apr: document generic qcom,apr compatible
  soc: qcom: Select REMAP_MMIO for ICC_BWMON driver
  soc: qcom: Select REMAP_MMIO for LLCC driver
  soc: qcom: rpmpd: Add SM4250 support
  dt-bindings: power: rpmpd: Add SM4250 support
  dt-bindings: soc: qcom: aoss: Add compatible for SM8550
  soc: qcom: llcc: Add configuration data for SM8550
  dt-bindings: arm: msm: Add LLCC compatible for SM8550
  soc: qcom: llcc: Add v4.1 HW version support
  soc: qcom: socinfo: Add SM8550 ID
  soc: qcom: rpmh-rsc: Avoid unnecessary checks on irq-done response
  soc: qcom: rpmh-rsc: Add support for RSC v3 register offsets
  soc: qcom: rpmhpd: Add SM8550 power domains
  dt-bindings: power: rpmpd: Add SM8550 to rpmpd binding
  soc: qcom: socinfo: Add MSM8956/76 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for MSM8956 and MSM8976
  ...