linux.git/drivers/acpi/arm64, branch v5.8

ACPI/IORT: Remove the unused __get_pci_rid()

2020-05-26T19:43:33+00:00

Since commit bc8648d49a95 ("ACPI/IORT: Handle PCI aliases properly for
IOMMUs"), __get_pci_rid() has become actually unused and can be removed.

Signed-off-by: Zenghui Yu 
Acked-by: Lorenzo Pieralisi 
Acked-by: Hanjun Guo 
Link: https://lore.kernel.org/r/20200509093430.1983-1-yuzenghui@huawei.com
Signed-off-by: Will Deacon

ACPI/IORT: Fix PMCG node single ID mapping handling

2020-05-20T17:43:28+00:00

An IORT PMCG node can have no ID mapping if its overflow interrupt is
wire based therefore the code that parses the PMCG node can not assume
the node will always have a single mapping present at index 0.

Fix iort_get_id_mapping_index() by checking for an overflow interrupt
and mapping count.

Fixes: 24e516049360 ("ACPI/IORT: Add support for PMCG")

Signed-off-by: Tuan Phan 
Reviewed-by: Hanjun Guo 
Acked-by: Lorenzo Pieralisi 
Link: https://lore.kernel.org/r/1589994787-28637-1-git-send-email-tuanphan@os.amperecomputing.com
Signed-off-by: Will Deacon

ACPI: IORT: Add comments for not calling acpi_put_table()

2020-05-18T17:08:04+00:00

The iort_table will be used at runtime after acpi_iort_init(),
so add some comments to clarify this to make it less confusing.

Signed-off-by: Hanjun Guo 
Link: https://lore.kernel.org/r/1588910753-18543-2-git-send-email-guohanjun@huawei.com
Signed-off-by: Will Deacon

ACPI: GTDT: Put GTDT table after parsing

2020-05-18T17:08:04+00:00

The mapped GTDT table needs to be released after
the driver init.

Signed-off-by: Hanjun Guo 
Link: https://lore.kernel.org/r/1588910753-18543-1-git-send-email-guohanjun@huawei.com
Signed-off-by: Will Deacon

ACPI: IORT: Add extra message "applying workaround" for off-by-1 issue

2020-05-11T15:03:55+00:00

As we already applied a workaround for the off-by-1 issue,
it's good to add extra message "applying workaround" to make
people less uneasy to see FW_BUG message in the boot log.

Signed-off-by: Hanjun Guo 
Acked-by: Ard Biesheuvel 
Link: https://lore.kernel.org/r/1588910198-8348-1-git-send-email-guohanjun@huawei.com
Signed-off-by: Will Deacon

ACPI/IORT: work around num_ids ambiguity

2020-05-04T11:07:41+00:00

The ID mapping table structure of the IORT table describes the size of
a range using a num_ids field carrying the number of IDs in the region
minus one. This has been misinterpreted in the past in the parsing code,
and firmware is known to have shipped where this results in an ambiguity,
where regions that should be adjacent have an overlap of one value.

So let's work around this by detecting this case specifically: when
resolving an ID translation, allow one that matches right at the end of
a multi-ID region to be superseded by a subsequent one.

To prevent potential regressions on broken firmware that happened to
work before, only take the subsequent match into account if it occurs
at the start of a mapping region.

Signed-off-by: Ard Biesheuvel 
Reviewed-by: Lorenzo Pieralisi 
Link: https://lore.kernel.org/r/20200501161014.5935-3-ardb@kernel.org
Signed-off-by: Will Deacon

Revert "ACPI/IORT: Fix 'Number of IDs' handling in iort_id_map()"

2020-05-04T11:07:41+00:00

This reverts commit 3c23b83a88d00383e1d498cfa515249aa2fe0238.

Signed-off-by: Ard Biesheuvel 
Link: https://lore.kernel.org/r/20200501161014.5935-2-ardb@kernel.org
Signed-off-by: Will Deacon

ACPI/IORT: take _DMA methods into account for named components

2020-04-28T17:06:07+00:00

Where IORT nodes for named components can describe simple DMA limits
expressed as the number of address bits a device can drive, _DMA methods
in AML can express more complex topologies, involving DMA translation in
particular.

Currently, we only take this _DMA method into account if it appears on a
ACPI device node describing a PCIe root complex, but it is perfectly
acceptable to use them for named components as well, so let's ensure
we take them into account in those cases too.

Note that such named components are expected to reside under a
pseudo-bus node such as the ACPI0004 container device, which should be
providing the _DMA method as well as a _CRS (as mandated by the ACPI
spec). This is not enforced by the code however.

Reported-by: Andrei Warkentin 
Signed-off-by: Ard Biesheuvel 
Acked-by: Lorenzo Pieralisi 
Link: https://lore.kernel.org/r/20200420092753.9819-1-ardb@kernel.org
Signed-off-by: Will Deacon

ACPI/IORT: Remove direct access of dev->iommu_fwspec

2020-03-27T10:12:19+00:00

Use the accessor functions instead of directly dereferencing
dev->iommu_fwspec.

Signed-off-by: Joerg Roedel 
Tested-by: Hanjun Guo 
Reviewed-by: Jean-Philippe Brucker 
Link: https://lore.kernel.org/r/20200326150841.10083-3-joro@8bytes.org

Merge tag 'iommu-updates-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

2020-02-05T17:49:54+00:00

Pull iommu updates from Joerg Roedel:

 - Allow compiling the ARM-SMMU drivers as modules.

 - Fixes and cleanups for the ARM-SMMU drivers and io-pgtable code
   collected by Will Deacon. The merge-commit (6855d1ba7537) has all the
   details.

 - Cleanup of the iommu_put_resv_regions() call-backs in various
   drivers.

 - AMD IOMMU driver cleanups.

 - Update for the x2APIC support in the AMD IOMMU driver.

 - Preparation patches for Intel VT-d nested mode support.

 - RMRR and identity domain handling fixes for the Intel VT-d driver.

 - More small fixes and cleanups.

* tag 'iommu-updates-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (87 commits)
  iommu/amd: Remove the unnecessary assignment
  iommu/vt-d: Remove unnecessary WARN_ON_ONCE()
  iommu/vt-d: Unnecessary to handle default identity domain
  iommu/vt-d: Allow devices with RMRRs to use identity domain
  iommu/vt-d: Add RMRR base and end addresses sanity check
  iommu/vt-d: Mark firmware tainted if RMRR fails sanity check
  iommu/amd: Remove unused struct member
  iommu/amd: Replace two consecutive readl calls with one readq
  iommu/vt-d: Don't reject Host Bridge due to scope mismatch
  PCI/ATS: Add PASID stubs
  iommu/arm-smmu-v3: Return -EBUSY when trying to re-add a device
  iommu/arm-smmu-v3: Improve add_device() error handling
  iommu/arm-smmu-v3: Use WRITE_ONCE() when changing validity of an STE
  iommu/arm-smmu-v3: Add second level of context descriptor table
  iommu/arm-smmu-v3: Prepare for handling arm_smmu_write_ctx_desc() failure
  iommu/arm-smmu-v3: Propagate ssid_bits
  iommu/arm-smmu-v3: Add support for Substream IDs
  iommu/arm-smmu-v3: Add context descriptor tables allocators
  iommu/arm-smmu-v3: Prepare arm_smmu_s1_cfg for SSID support
  ACPI/IORT: Parse SSID property of named component node
  ...