linux.git/arch/xtensa/kernel, branch v4.6-rc2

Merge tag 'xtensa-next-20160320' of git://github.com/czankel/xtensa-linux

2016-03-20T19:22:07+00:00

Pull Xtensa updates from Chris Zankel:
 "Xtensa improvements for 4.6:

   - control whether perf IRQ is treated as NMI from Kconfig
   - implement ioremap for regions outside KIO segment
   - fix ISS serial port behaviour when EOF is reached
   - fix preemption in {clear,copy}_user_highpage
   - fix endianness issues for XTFPGA devices, big-endian cores are now
     fully functional
   - clean up debug infrastructure and add support for hardware
     breakpoints and watchpoints
   - add processor configurations for Three Core HiFi-2 MX and HiFi3
     cpus"

* tag 'xtensa-next-20160320' of git://github.com/czankel/xtensa-linux:
  xtensa: add test_kc705_hifi variant
  xtensa: add Three Core HiFi-2 MX Variant.
  xtensa: support hardware breakpoints/watchpoints
  xtensa: use context structure for debug exceptions
  xtensa: remove remaining non-functional KGDB bits
  xtensa: clear all DBREAKC registers on start
  xtensa: xtfpga: fix earlycon endianness
  xtensa: xtfpga: fix i2c controller register width and endianness
  xtensa: xtfpga: fix ethernet controller endianness
  xtensa: xtfpga: fix serial port register width and endianness
  xtensa: define CONFIG_CPU_{BIG,LITTLE}_ENDIAN
  xtensa: fix preemption in {clear,copy}_user_highpage
  xtensa: ISS: don't hang if stdin EOF is reached
  xtensa: support ioremap for memory outside KIO region
  xtensa: use XTENSA_INT_LEVEL macro in asm/timex.h
  xtensa: make fake NMI configurable

xtensa: support hardware breakpoints/watchpoints

2016-03-11T08:53:32+00:00

Use perf framework to manage hardware instruction and data breakpoints.
Add two new ptrace calls: PTRACE_GETHBPREGS and PTRACE_SETHBPREGS to
query and set instruction and data breakpoints.
Address bit 0 choose instruction (0) or data (1) break register, bits
31..1 are the register number.
Both calls transfer two 32-bit words: address (0) and control (1).
Instruction breakpoint contorl word is 0 to clear breakpoint, 1 to set.
Data breakpoint control word bit 31 is 'trigger on store', bit 30 is
'trigger on load, bits 29..0 are length. Length 0 is used to clear a
breakpoint. To set a breakpoint length must be a power of 2 in the range
1..64 and the address must be length-aligned.

Introduce new thread_info flag: TIF_DB_DISABLED. Set it if debug
exception is raised by the kernel code accessing watched userspace
address and disable corresponding data breakpoint. On exit to userspace
check that flag and, if set, restore all data breakpoints.

Handle debug exceptions raised with PS.EXCM set. This may happen when
window overflow/underflow handler or fast exception handler hits data
breakpoint, in which case save and disable all data breakpoints,
single-step faulting instruction and restore data breakpoints.

Signed-off-by: Max Filippov

xtensa: use context structure for debug exceptions

2016-03-11T08:53:32+00:00

With implementation of data breakpoints debug exceptions raised when
PS.EXCM is set need to be handled, e.g. window overflow code can write
to watched userspace address. Currently debug exception handler uses
EXCSAVE and DEPC SRs to save temporary registers, but DEPC may not be
available when PS.EXCM is set and more space will be needed to save
additional state.
Reorganize debug context: create per-CPU structure debug_table instance
and store its address in the EXCSAVE instead of
debug_exception function address. Expand this structure when more save
space is needed.

Signed-off-by: Max Filippov

xtensa: remove remaining non-functional KGDB bits

2016-03-11T08:53:32+00:00

KGDB is not supported on xtensa, but there are bits of related code
under arch/xtensa/kernel. Remove these bits.

Signed-off-by: Max Filippov

xtensa: clear all DBREAKC registers on start

2016-03-11T08:53:32+00:00

There are XCHAL_NUM_DBREAK registers, clear them all.
This also fixes cryptic assembler error message with binutils 2.25 when
XCHAL_NUM_DBREAK is 0:

  as: out of memory allocating 18446744073709551575 bytes after a total
  of 495616 bytes

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov

arch/hotplug: Call into idle with a proper state

2016-03-01T19:36:57+00:00

Let the non boot cpus call into idle with the corresponding hotplug state, so
the hotplug core can handle the further bringup. That's a first step to
convert the boot side of the hotplugged cpus to do all the synchronization
with the other side through the state machine. For now it'll only start the
hotplug thread and kick the full bringup of the cpu.

Signed-off-by: Thomas Gleixner 
Cc: linux-arch@vger.kernel.org
Cc: Rik van Riel 
Cc: Rafael Wysocki 
Cc: "Srivatsa S. Bhat" 
Cc: Peter Zijlstra 
Cc: Arjan van de Ven 
Cc: Sebastian Siewior 
Cc: Rusty Russell 
Cc: Steven Rostedt 
Cc: Oleg Nesterov 
Cc: Tejun Heo 
Cc: Andrew Morton 
Cc: Paul McKenney 
Cc: Linus Torvalds 
Cc: Paul Turner 
Link: http://lkml.kernel.org/r/20160226182341.614102639@linutronix.de
Signed-off-by: Thomas Gleixner

xtensa: make fake NMI configurable

2016-01-11T14:31:55+00:00

Do not always use fake NMI when safe, provide Kconfig option instead.
Print a warning if fake NMI is chosen in unsafe configuration, but allow
it, because it may work if the user knows that interrupts with
priorities at or above PMM IRQ are not used. Add a check to NMI handler
that BUGs if any of these IRQs fire.

Signed-off-by: Max Filippov

Merge tag 'xtensa-20151108' of git://github.com/czankel/xtensa-linux

2015-11-10T00:32:13+00:00

Pull xtensa updates from Chris Zankel:

 - fix remaining issues with noMMU cores
 - fix build for cores w/o cache or zero overhead loop options
 - fix boot of secondary cores in SMP configuration
 - add support for DMA to high memory pages
 - add dma_to_phys and phys_to_dma functions.

* tag 'xtensa-20151108' of git://github.com/czankel/xtensa-linux:
  xtensa: implement dma_to_phys and phys_to_dma
  xtensa: support DMA to high memory
  Revert "xtensa: cache inquiry and unaligned cache handling functions"
  xtensa: drop unused sections and remapped reset handlers
  xtensa: fix secondary core boot in SMP
  xtensa: add FORCE_MAX_ZONEORDER to Kconfig
  xtensa: nommu: provide defconfig for de212 on kc705
  xtensa: nommu: xtfpga: add kc705 DTS
  xtensa: add de212 core variant
  xtensa: nommu: select HAVE_FUTEX_CMPXCHG
  xtensa: nommu: fix default memory start address
  xtensa: nommu: provide correct KIO addresses
  xtensa: nommu: fix USER_RING definition
  xtensa: xtfpga: fix integer overflow in TASK_SIZE
  xtensa: fix build for configs without cache options
  xtensa: fixes for configs without loop option

xtensa: support DMA to high memory

2015-11-08T22:25:37+00:00

- don't bugcheck if high memory page is passed to xtensa_map_page;
- turn empty dcache flush macros into functions so that they could be
  passed as function parameters;
- use kmap_atomic to map high memory pages for cache invalidation/
  flushing performed by xtensa_sync_single_for_{cpu,device}.

Signed-off-by: Max Filippov

xtensa: drop unused sections and remapped reset handlers

2015-11-03T14:19:39+00:00

There are no .bootstrap or .ResetVector.text sections linked to the
vmlinux image, drop these sections from vmlinux.ld.S. Drop
RESET_VECTOR_VADDR definition only used for .ResetVector.text.

Drop remapped copies of primary and secondary reset vectors, as modern
gdb don't have problems stepping through instructions at arbitrary
locations. Drop corresponding sections from the corresponding linker
scripts.

Signed-off-by: Max Filippov