linux.git/arch/xtensa/kernel, branch v3.14-rc2

xtensa: remap io area defined in device tree

2014-01-14T20:25:14+00:00

Use the simple-bus node to discover the io area, and remap the cached and
bypass io ranges. The parent-bus-address value of the first triplet in the
"ranges" property is used. This value is rounded down to the nearest 256MB
boundary. The length of the io area is fixed at 256MB; the "ranges" property
length value is ignored.

Other limitations: (1) only the first simple-bus node is considered, and (2)
only the first triplet of the "ranges" property is considered.

See ePAPR 1.1 §6.5 for the simple-bus node description, and §2.3.8 for the
"ranges" property description.

Signed-off-by: Baruch Siach 
Signed-off-by: Max Filippov

xtensa: support default device tree buses

2014-01-14T20:24:12+00:00

This currently includes simple-bus.

Signed-off-by: Baruch Siach 
Signed-off-by: Max Filippov

xtensa: initialize device tree clock sources

2014-01-14T20:24:05+00:00

Signed-off-by: Baruch Siach 
Signed-off-by: Max Filippov

xtensa: Enable irqs after cpu is set online

2014-01-14T20:12:41+00:00

there is a small possibility that wake_up of softirq thread
happens between local_irq_enable() and set_cpu_online(). In
this case affinity of the thread changes to fallback affinity
(i.e. CPU0). This may be a source of problems.

The patch kills that possibility.

Signed-off-by: Kirill Tkhai 
Signed-off-by: Max Filippov

xtensa: Switch to sched_clock_register()

2014-01-14T18:19:59+00:00

The 32 bit sched_clock interface now supports 64 bits. Upgrade
to the 64 bit function to allow us to remove the 32 bit
registration interface.

Signed-off-by: Stephen Boyd 
Acked-by: Max Filippov 
Signed-off-by: Chris Zankel

xtensa: implement CPU hotplug

2014-01-14T18:19:59+00:00

Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel

xtensa: add SMP support

2014-01-14T18:19:58+00:00

This is largely based on SMP code from the xtensa-2.6.29-smp tree by
Piet Delaney, Marc Gauthier, Joe Taylor, Christian Zankel (and possibly
other Tensilica folks).

Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel

xtensa: add MX irqchip

2014-01-14T18:19:58+00:00

MX is an interrupt distributor used in some SMP-capable xtensa
configurations.

Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel

xtensa: clear timer IRQ unconditionally in its handler

2014-01-14T18:19:57+00:00

PIC irq_ack doesn't clear timer IRQ, because timer interrupt handler
usually set up new timer by writing to ccompare register and thus
clearing timer IRQ. However timer may not be set up in the IRQ handler,
e.g. with tickless idle on SMP, or when CPU is going offline, leaving
timer IRQ raised and making do_interrupt attempting to handle it
forever.

To fix this always write current value of ccompare SR chosen to be linux
timer back to that SR on entry to timer interrupt handler.

Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel

xtensa: clean up do_interrupt/do_IRQ

2014-01-14T18:19:57+00:00

- set up irq registers and call irq_enter/irq_exit once for each kernel
  entry due to interrupt;
- don't attempt to clear current IRQ in the do_interrupt, IRQ handler
  will take care of it;
- find pending interrupt with highest priority before every ISR
  invocation.

Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel